From: Saeed Mahameed <saeed@kernel.org>
To: Jakub Kicinski <kuba@kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>,
netdev@vger.kernel.org, linux-rdma@vger.kernel.org,
Leon Romanovsky <leonro@nvidia.com>,
Yevgeny Kliteynik <kliteyn@nvidia.com>,
Dan Carpenter <dan.carpenter@oracle.com>,
Alex Vesker <valex@nvidia.com>,
Saeed Mahameed <saeedm@nvidia.com>
Subject: [net-next 01/11] net/mlx5: DR, Fix potential shift wrapping of 32-bit value
Date: Fri, 29 Jan 2021 18:26:08 -0800 [thread overview]
Message-ID: <20210130022618.317351-2-saeed@kernel.org> (raw)
In-Reply-To: <20210130022618.317351-1-saeed@kernel.org>
From: Yevgeny Kliteynik <kliteyn@nvidia.com>
Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr.
Fixes: 6b93b400aa88 ("net/mlx5: DR, Move STEv0 setters and getters")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
---
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c
index b76fdff08890..9ec079247c4b 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c
@@ -248,8 +248,8 @@ static void dr_ste_v0_set_miss_addr(u8 *hw_ste_p, u64 miss_addr)
static u64 dr_ste_v0_get_miss_addr(u8 *hw_ste_p)
{
u64 index =
- (MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) |
- MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32) << 26);
+ ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) |
+ ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32)) << 26);
return index << 6;
}
--
2.29.2
next prev parent reply other threads:[~2021-01-30 9:00 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-30 2:26 [pull request][net-next 00/11] mlx5 SW steering for ConnectX-6DX Saeed Mahameed
2021-01-30 2:26 ` Saeed Mahameed [this message]
2021-02-02 3:00 ` [net-next 01/11] net/mlx5: DR, Fix potential shift wrapping of 32-bit value patchwork-bot+netdevbpf
2021-01-30 2:26 ` [net-next 02/11] net/mlx5: DR, Add match STEv1 structs to ifc Saeed Mahameed
2021-01-30 2:26 ` [net-next 03/11] net/mlx5: DR, Add HW STEv1 match logic Saeed Mahameed
2021-01-30 2:26 ` [net-next 04/11] net/mlx5: DR, Allow native protocol support for HW STEv1 Saeed Mahameed
2021-01-30 2:26 ` [net-next 05/11] net/mlx5: DR, Add STEv1 setters and getters Saeed Mahameed
2021-01-30 2:26 ` [net-next 06/11] net/mlx5: DR, Add STEv1 action apply logic Saeed Mahameed
2021-01-30 2:26 ` [net-next 07/11] net/mlx5: DR, Add STEv1 modify header logic Saeed Mahameed
2021-01-30 2:26 ` [net-next 08/11] net/mlx5: DR, Use the right size when writing partial STE into HW Saeed Mahameed
2021-01-30 2:26 ` [net-next 09/11] net/mlx5: DR, Use HW specific logic API when writing STE Saeed Mahameed
2021-01-30 2:26 ` [net-next 10/11] net/mlx5: DR, Copy all 64B whenever replacing STE in the head of miss-list Saeed Mahameed
2021-01-30 2:26 ` [net-next 11/11] net/mlx5: DR, Allow SW steering for sw_owner_v2 devices Saeed Mahameed
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