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From: Lee Jones <lee.jones@linaro.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: "Rob Herring" <robh@kernel.org>,
	"Jernej Skrabec" <jernej.skrabec@siol.net>,
	"Samuel Holland" <samuel@sholland.org>,
	"Yangtao Li" <tiny.windzz@gmail.com>,
	linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org,
	"Maxime Ripard" <mripard@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Clément Péron" <peron.clem@gmail.com>,
	"Shuosheng Huang" <huangshuosheng@allwinnertech.com>,
	linux-arm-kernel@lists.infradead.org,
	"Icenowy Zheng" <icenowy@aosc.io>
Subject: Re: [PATCH v5 06/20] mfd: axp20x: Allow AXP chips without interrupt lines
Date: Tue, 2 Feb 2021 08:12:29 +0000	[thread overview]
Message-ID: <20210202081229.GW4774@dell> (raw)
In-Reply-To: <20210127172500.13356-7-andre.przywara@arm.com>

On Wed, 27 Jan 2021, Andre Przywara wrote:

> Currently the AXP chip requires to have its IRQ line connected to some
> interrupt controller, and will fail probing when this is not the case.
> 
> On a new Allwinner SoC (H616) there is no NMI pin anymore, and at
> least one board does not connect the AXP's IRQ pin to anything else,
> so the interrupt functionality of the AXP chip is simply not available.
> 
> Check whether the interrupt line number returned by the platform code is
> valid, before trying to register the irqchip. If not, we skip this
> registration, to avoid the driver to bail out completely.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  drivers/mfd/axp20x.c | 17 +++++++++++------
>  1 file changed, 11 insertions(+), 6 deletions(-)

For my own reference (apply this as-is to your sign-off block):

  Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog

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WARNING: multiple messages have this Message-ID (diff)
From: Lee Jones <lee.jones@linaro.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: "Maxime Ripard" <mripard@kernel.org>,
	"Chen-Yu Tsai" <wens@csie.org>,
	"Jernej Skrabec" <jernej.skrabec@siol.net>,
	"Samuel Holland" <samuel@sholland.org>,
	"Icenowy Zheng" <icenowy@aosc.io>,
	"Rob Herring" <robh@kernel.org>,
	"Clément Péron" <peron.clem@gmail.com>,
	"Shuosheng Huang" <huangshuosheng@allwinnertech.com>,
	"Yangtao Li" <tiny.windzz@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH v5 06/20] mfd: axp20x: Allow AXP chips without interrupt lines
Date: Tue, 2 Feb 2021 08:12:29 +0000	[thread overview]
Message-ID: <20210202081229.GW4774@dell> (raw)
In-Reply-To: <20210127172500.13356-7-andre.przywara@arm.com>

On Wed, 27 Jan 2021, Andre Przywara wrote:

> Currently the AXP chip requires to have its IRQ line connected to some
> interrupt controller, and will fail probing when this is not the case.
> 
> On a new Allwinner SoC (H616) there is no NMI pin anymore, and at
> least one board does not connect the AXP's IRQ pin to anything else,
> so the interrupt functionality of the AXP chip is simply not available.
> 
> Check whether the interrupt line number returned by the platform code is
> valid, before trying to register the irqchip. If not, we skip this
> registration, to avoid the driver to bail out completely.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  drivers/mfd/axp20x.c | 17 +++++++++++------
>  1 file changed, 11 insertions(+), 6 deletions(-)

For my own reference (apply this as-is to your sign-off block):

  Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog

  parent reply	other threads:[~2021-02-02  8:13 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-27 17:24 [PATCH v5 00/20] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara
2021-01-27 17:24 ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 01/20] dt-bindings: clk: sunxi-ccu: Add compatible string for Allwinner H616 Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 02/20] clk: sunxi-ng: Add support for the Allwinner H616 R-CCU Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 03/20] clk: sunxi-ng: Add support for the Allwinner H616 CCU Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 04/20] dt-bindings: mfd: axp20x: Add AXP305 compatible (plus optional IRQ) Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-28 10:15   ` Maxime Ripard
2021-01-28 10:15     ` Maxime Ripard
2021-02-02  7:55   ` [linux-sunxi] " Chen-Yu Tsai
2021-02-02  7:55     ` Chen-Yu Tsai
2021-02-02 10:11     ` Andre Przywara
2021-02-02 10:11       ` Andre Przywara
2021-02-05 21:56   ` Rob Herring
2021-02-05 21:56     ` Rob Herring
2021-01-27 17:24 ` [PATCH v5 05/20] Input: axp20x-pek: Bail out if AXP has no interrupt line connected Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 19:42   ` Dmitry Torokhov
2021-01-27 19:42     ` Dmitry Torokhov
2021-01-28 11:11     ` Andre Przywara
2021-01-28 11:11       ` Andre Przywara
2021-01-28 11:36       ` Mark Brown
2021-01-28 11:36         ` Mark Brown
2021-01-28 12:31         ` Andre Przywara
2021-01-28 12:31           ` Andre Przywara
2021-01-28 15:05           ` Mark Brown
2021-01-28 15:05             ` Mark Brown
2021-01-27 17:24 ` [PATCH v5 06/20] mfd: axp20x: Allow AXP chips without interrupt lines Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-28 10:15   ` Maxime Ripard
2021-01-28 10:15     ` Maxime Ripard
2021-02-02  7:58     ` [linux-sunxi] " Chen-Yu Tsai
2021-02-02  7:58       ` Chen-Yu Tsai
2021-02-02  8:12   ` Lee Jones [this message]
2021-02-02  8:12     ` Lee Jones
2021-01-27 17:24 ` [PATCH v5 07/20] dt-bindings: sram: sunxi-sram: Add H616 compatible string Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 08/20] soc: sunxi: sram: Add support for more than one EMAC clock Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 09/20] dt-bindings: watchdog: sun4i: Add H616 compatible string Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 10/20] dt-bindings: i2c: mv64xxx: " Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-28  8:44   ` Wolfram Sang
2021-01-28  8:44     ` Wolfram Sang
2021-01-27 17:24 ` [PATCH v5 11/20] dt-bindings: media: IR: Add H616 IR " Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 12/20] dt-bindings: rtc: sun6i: Add H616 " Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-28 10:20   ` Maxime Ripard
2021-01-28 10:20     ` Maxime Ripard
2021-01-31 13:44   ` Jernej Škrabec
2021-02-02  0:05     ` Andre Przywara
2021-02-02  0:05       ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 13/20] dt-bindings: spi: sunxi: " Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 14/20] dt-bindings: bus: rsb: " Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-02-02  7:57   ` Chen-Yu Tsai
2021-02-02  7:57     ` Chen-Yu Tsai
2021-01-27 17:24 ` [PATCH v5 15/20] dt-bindings: net: sun8i-emac: " Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-28 10:21   ` Maxime Ripard
2021-01-28 10:21     ` Maxime Ripard
2021-02-05 21:58   ` Rob Herring
2021-02-05 21:58     ` Rob Herring
2021-01-27 17:24 ` [PATCH v5 16/20] net: stmmac: dwmac-sun8i: Prepare for second EMAC clock register Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-28 10:21   ` Maxime Ripard
2021-01-28 10:21     ` Maxime Ripard
2021-01-27 17:24 ` [PATCH v5 17/20] phy: sun4i-usb: Rework HCI PHY (aka. "pmu_unk1") handling Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 18/20] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:24 ` [PATCH v5 19/20] dt-bindings: arm: sunxi: Add OrangePi Zero 2 binding Andre Przywara
2021-01-27 17:24   ` Andre Przywara
2021-01-27 17:25 ` [PATCH v5 20/20] arm64: dts: allwinner: Add OrangePi Zero 2 .dts Andre Przywara
2021-01-27 17:25   ` Andre Przywara

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