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From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH 23/49] perf/x86/msr: Add Alder Lake CPU support
Date: Tue, 09 Feb 2021 11:58:51 +0800	[thread overview]
Message-ID: <202102091153.8YFcmWIL-lkp@intel.com> (raw)
In-Reply-To: <1612797946-18784-24-git-send-email-kan.liang@linux.intel.com>

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Hi,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on tip/perf/core]
[cannot apply to tip/master linus/master tip/x86/core v5.11-rc6 next-20210125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/kan-liang-linux-intel-com/Add-Alder-Lake-support-for-perf/20210209-070642
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 32451614da2a9cf4296f90d3606ac77814fb519d
config: x86_64-randconfig-s021-20210209 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.3-215-g0fb77bb6-dirty
        # https://github.com/0day-ci/linux/commit/ef3d3e5028f5f70a78fa37d642e8e7e65c60dee7
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review kan-liang-linux-intel-com/Add-Alder-Lake-support-for-perf/20210209-070642
        git checkout ef3d3e5028f5f70a78fa37d642e8e7e65c60dee7
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   arch/x86/events/msr.c: In function 'test_intel':
>> arch/x86/events/msr.c:104:7: error: 'INTEL_FAM6_ALDERLAKE_L' undeclared (first use in this function); did you mean 'INTEL_FAM6_ALDERLAKE'?
     104 |  case INTEL_FAM6_ALDERLAKE_L:
         |       ^~~~~~~~~~~~~~~~~~~~~~
         |       INTEL_FAM6_ALDERLAKE
   arch/x86/events/msr.c:104:7: note: each undeclared identifier is reported only once for each function it appears in


vim +104 arch/x86/events/msr.c

    39	
    40	static bool test_intel(int idx, void *data)
    41	{
    42		if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
    43		    boot_cpu_data.x86 != 6)
    44			return false;
    45	
    46		switch (boot_cpu_data.x86_model) {
    47		case INTEL_FAM6_NEHALEM:
    48		case INTEL_FAM6_NEHALEM_G:
    49		case INTEL_FAM6_NEHALEM_EP:
    50		case INTEL_FAM6_NEHALEM_EX:
    51	
    52		case INTEL_FAM6_WESTMERE:
    53		case INTEL_FAM6_WESTMERE_EP:
    54		case INTEL_FAM6_WESTMERE_EX:
    55	
    56		case INTEL_FAM6_SANDYBRIDGE:
    57		case INTEL_FAM6_SANDYBRIDGE_X:
    58	
    59		case INTEL_FAM6_IVYBRIDGE:
    60		case INTEL_FAM6_IVYBRIDGE_X:
    61	
    62		case INTEL_FAM6_HASWELL:
    63		case INTEL_FAM6_HASWELL_X:
    64		case INTEL_FAM6_HASWELL_L:
    65		case INTEL_FAM6_HASWELL_G:
    66	
    67		case INTEL_FAM6_BROADWELL:
    68		case INTEL_FAM6_BROADWELL_D:
    69		case INTEL_FAM6_BROADWELL_G:
    70		case INTEL_FAM6_BROADWELL_X:
    71	
    72		case INTEL_FAM6_ATOM_SILVERMONT:
    73		case INTEL_FAM6_ATOM_SILVERMONT_D:
    74		case INTEL_FAM6_ATOM_AIRMONT:
    75	
    76		case INTEL_FAM6_ATOM_GOLDMONT:
    77		case INTEL_FAM6_ATOM_GOLDMONT_D:
    78		case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
    79		case INTEL_FAM6_ATOM_TREMONT_D:
    80		case INTEL_FAM6_ATOM_TREMONT:
    81		case INTEL_FAM6_ATOM_TREMONT_L:
    82	
    83		case INTEL_FAM6_XEON_PHI_KNL:
    84		case INTEL_FAM6_XEON_PHI_KNM:
    85			if (idx == PERF_MSR_SMI)
    86				return true;
    87			break;
    88	
    89		case INTEL_FAM6_SKYLAKE_L:
    90		case INTEL_FAM6_SKYLAKE:
    91		case INTEL_FAM6_SKYLAKE_X:
    92		case INTEL_FAM6_KABYLAKE_L:
    93		case INTEL_FAM6_KABYLAKE:
    94		case INTEL_FAM6_COMETLAKE_L:
    95		case INTEL_FAM6_COMETLAKE:
    96		case INTEL_FAM6_ICELAKE_L:
    97		case INTEL_FAM6_ICELAKE:
    98		case INTEL_FAM6_ICELAKE_X:
    99		case INTEL_FAM6_ICELAKE_D:
   100		case INTEL_FAM6_TIGERLAKE_L:
   101		case INTEL_FAM6_TIGERLAKE:
   102		case INTEL_FAM6_ROCKETLAKE:
   103		case INTEL_FAM6_ALDERLAKE:
 > 104		case INTEL_FAM6_ALDERLAKE_L:
   105			if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
   106				return true;
   107			break;
   108		}
   109	
   110		return false;
   111	}
   112	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com>
To: kan.liang@linux.intel.com, peterz@infradead.org, acme@kernel.org,
	mingo@kernel.org, linux-kernel@vger.kernel.org
Cc: kbuild-all@lists.01.org, tglx@linutronix.de, bp@alien8.de,
	namhyung@kernel.org, jolsa@redhat.com, ak@linux.intel.com,
	yao.jin@linux.intel.com
Subject: Re: [PATCH 23/49] perf/x86/msr: Add Alder Lake CPU support
Date: Tue, 9 Feb 2021 11:58:51 +0800	[thread overview]
Message-ID: <202102091153.8YFcmWIL-lkp@intel.com> (raw)
In-Reply-To: <1612797946-18784-24-git-send-email-kan.liang@linux.intel.com>

[-- Attachment #1: Type: text/plain, Size: 4217 bytes --]

Hi,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on tip/perf/core]
[cannot apply to tip/master linus/master tip/x86/core v5.11-rc6 next-20210125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/kan-liang-linux-intel-com/Add-Alder-Lake-support-for-perf/20210209-070642
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 32451614da2a9cf4296f90d3606ac77814fb519d
config: x86_64-randconfig-s021-20210209 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.3-215-g0fb77bb6-dirty
        # https://github.com/0day-ci/linux/commit/ef3d3e5028f5f70a78fa37d642e8e7e65c60dee7
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review kan-liang-linux-intel-com/Add-Alder-Lake-support-for-perf/20210209-070642
        git checkout ef3d3e5028f5f70a78fa37d642e8e7e65c60dee7
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   arch/x86/events/msr.c: In function 'test_intel':
>> arch/x86/events/msr.c:104:7: error: 'INTEL_FAM6_ALDERLAKE_L' undeclared (first use in this function); did you mean 'INTEL_FAM6_ALDERLAKE'?
     104 |  case INTEL_FAM6_ALDERLAKE_L:
         |       ^~~~~~~~~~~~~~~~~~~~~~
         |       INTEL_FAM6_ALDERLAKE
   arch/x86/events/msr.c:104:7: note: each undeclared identifier is reported only once for each function it appears in


vim +104 arch/x86/events/msr.c

    39	
    40	static bool test_intel(int idx, void *data)
    41	{
    42		if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ||
    43		    boot_cpu_data.x86 != 6)
    44			return false;
    45	
    46		switch (boot_cpu_data.x86_model) {
    47		case INTEL_FAM6_NEHALEM:
    48		case INTEL_FAM6_NEHALEM_G:
    49		case INTEL_FAM6_NEHALEM_EP:
    50		case INTEL_FAM6_NEHALEM_EX:
    51	
    52		case INTEL_FAM6_WESTMERE:
    53		case INTEL_FAM6_WESTMERE_EP:
    54		case INTEL_FAM6_WESTMERE_EX:
    55	
    56		case INTEL_FAM6_SANDYBRIDGE:
    57		case INTEL_FAM6_SANDYBRIDGE_X:
    58	
    59		case INTEL_FAM6_IVYBRIDGE:
    60		case INTEL_FAM6_IVYBRIDGE_X:
    61	
    62		case INTEL_FAM6_HASWELL:
    63		case INTEL_FAM6_HASWELL_X:
    64		case INTEL_FAM6_HASWELL_L:
    65		case INTEL_FAM6_HASWELL_G:
    66	
    67		case INTEL_FAM6_BROADWELL:
    68		case INTEL_FAM6_BROADWELL_D:
    69		case INTEL_FAM6_BROADWELL_G:
    70		case INTEL_FAM6_BROADWELL_X:
    71	
    72		case INTEL_FAM6_ATOM_SILVERMONT:
    73		case INTEL_FAM6_ATOM_SILVERMONT_D:
    74		case INTEL_FAM6_ATOM_AIRMONT:
    75	
    76		case INTEL_FAM6_ATOM_GOLDMONT:
    77		case INTEL_FAM6_ATOM_GOLDMONT_D:
    78		case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
    79		case INTEL_FAM6_ATOM_TREMONT_D:
    80		case INTEL_FAM6_ATOM_TREMONT:
    81		case INTEL_FAM6_ATOM_TREMONT_L:
    82	
    83		case INTEL_FAM6_XEON_PHI_KNL:
    84		case INTEL_FAM6_XEON_PHI_KNM:
    85			if (idx == PERF_MSR_SMI)
    86				return true;
    87			break;
    88	
    89		case INTEL_FAM6_SKYLAKE_L:
    90		case INTEL_FAM6_SKYLAKE:
    91		case INTEL_FAM6_SKYLAKE_X:
    92		case INTEL_FAM6_KABYLAKE_L:
    93		case INTEL_FAM6_KABYLAKE:
    94		case INTEL_FAM6_COMETLAKE_L:
    95		case INTEL_FAM6_COMETLAKE:
    96		case INTEL_FAM6_ICELAKE_L:
    97		case INTEL_FAM6_ICELAKE:
    98		case INTEL_FAM6_ICELAKE_X:
    99		case INTEL_FAM6_ICELAKE_D:
   100		case INTEL_FAM6_TIGERLAKE_L:
   101		case INTEL_FAM6_TIGERLAKE:
   102		case INTEL_FAM6_ROCKETLAKE:
   103		case INTEL_FAM6_ALDERLAKE:
 > 104		case INTEL_FAM6_ALDERLAKE_L:
   105			if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
   106				return true;
   107			break;
   108		}
   109	
   110		return false;
   111	}
   112	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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  reply	other threads:[~2021-02-09  3:58 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-08 15:24 [PATCH 00/49] Add Alder Lake support for perf kan.liang
2021-02-08 15:24 ` [PATCH 01/49] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit kan.liang
2021-02-08 15:24 ` [PATCH 02/49] x86/cpu: Describe hybrid CPUs in cpuinfo_x86 kan.liang
2021-02-08 17:56   ` Borislav Petkov
2021-02-08 19:04     ` Liang, Kan
2021-02-08 19:10       ` Luck, Tony
2021-02-08 19:19         ` Borislav Petkov
2021-02-08 15:25 ` [PATCH 03/49] perf/x86/intel: Hybrid PMU support for perf capabilities kan.liang
2021-02-08 15:25 ` [PATCH 04/49] perf/x86: Hybrid PMU support for intel_ctrl kan.liang
2021-02-08 15:25 ` [PATCH 05/49] perf/x86: Hybrid PMU support for counters kan.liang
2021-02-08 15:25 ` [PATCH 06/49] perf/x86: Hybrid PMU support for unconstrained kan.liang
2021-02-08 15:25 ` [PATCH 07/49] perf/x86: Hybrid PMU support for hardware cache event kan.liang
2021-02-08 15:25 ` [PATCH 08/49] perf/x86: Hybrid PMU support for event constraints kan.liang
2021-02-08 15:25 ` [PATCH 09/49] perf/x86: Hybrid PMU support for extra_regs kan.liang
2021-02-08 15:25 ` [PATCH 10/49] perf/x86/intel: Factor out intel_pmu_check_num_counters kan.liang
2021-02-08 15:25 ` [PATCH 11/49] perf/x86/intel: Factor out intel_pmu_check_event_constraints kan.liang
2021-02-08 15:25 ` [PATCH 12/49] perf/x86/intel: Factor out intel_pmu_check_extra_regs kan.liang
2021-02-08 15:25 ` [PATCH 13/49] perf/x86: Expose check_hw_exists kan.liang
2021-02-08 15:25 ` [PATCH 14/49] perf/x86: Remove temporary pmu assignment in event_init kan.liang
2021-02-08 15:25 ` [PATCH 15/49] perf/x86: Factor out x86_pmu_show_pmu_cap kan.liang
2021-02-08 15:25 ` [PATCH 16/49] perf/x86: Register hybrid PMUs kan.liang
2021-02-08 15:25 ` [PATCH 17/49] perf/x86: Add structures for the attributes of Hybrid PMUs kan.liang
2021-02-08 15:25 ` [PATCH 18/49] perf/x86/intel: Add attr_update for " kan.liang
2021-02-08 15:25 ` [PATCH 19/49] perf/x86: Support filter_match callback kan.liang
2021-02-08 15:25 ` [PATCH 20/49] perf/x86/intel: Add Alder Lake Hybrid support kan.liang
2021-02-09  2:28   ` kernel test robot
2021-02-09  4:24   ` kernel test robot
2021-02-08 15:25 ` [PATCH 21/49] perf: Introduce PERF_TYPE_HARDWARE_PMU and PERF_TYPE_HW_CACHE_PMU kan.liang
2021-02-08 15:25 ` [PATCH 22/49] perf/x86/intel/uncore: Add Alder Lake support kan.liang
2021-02-09  4:18   ` kernel test robot
2021-02-09  4:18     ` kernel test robot
2021-02-08 15:25 ` [PATCH 23/49] perf/x86/msr: Add Alder Lake CPU support kan.liang
2021-02-09  3:58   ` kernel test robot [this message]
2021-02-09  3:58     ` kernel test robot
2021-02-09 13:44     ` Liang, Kan
2021-02-09 13:44       ` Liang, Kan
2021-02-09  5:15   ` kernel test robot
2021-02-09  5:15     ` kernel test robot
2021-02-08 15:25 ` [PATCH 24/49] perf/x86/cstate: " kan.liang
2021-02-08 15:25 ` [PATCH 25/49] perf/x86/rapl: Add support for Intel Alder Lake kan.liang
2021-02-09  5:16   ` kernel test robot
2021-02-09  5:16     ` kernel test robot
2021-02-08 15:25 ` [PATCH 26/49] perf jevents: Support unit value "cpu_core" and "cpu_atom" kan.liang
2021-02-08 15:25 ` [PATCH 27/49] perf util: Save pmu name to struct perf_pmu_alias kan.liang
2021-02-08 18:57   ` Arnaldo Carvalho de Melo
2021-02-09  0:17     ` Jin, Yao
2021-02-08 15:25 ` [PATCH 28/49] perf pmu: Save detected hybrid pmus to a global pmu list kan.liang
2021-02-08 18:55   ` Arnaldo Carvalho de Melo
2021-02-09  0:05     ` Jin, Yao
2021-02-08 15:25 ` [PATCH 29/49] perf pmu: Add hybrid helper functions kan.liang
2021-02-08 15:25 ` [PATCH 30/49] perf list: Support --cputype option to list hybrid pmu events kan.liang
2021-02-08 15:25 ` [PATCH 31/49] perf stat: Hybrid evsel uses its own cpus kan.liang
2021-02-08 15:25 ` [PATCH 32/49] perf header: Support HYBRID_TOPOLOGY feature kan.liang
2021-02-08 19:05   ` Arnaldo Carvalho de Melo
2021-02-09  0:26     ` Jin, Yao
2021-02-08 15:25 ` [PATCH 33/49] perf header: Support hybrid CPU_PMU_CAPS kan.liang
2021-02-08 15:25 ` [PATCH 34/49] tools headers uapi: Update tools's copy of linux/perf_event.h kan.liang
2021-02-08 15:25 ` [PATCH 35/49] perf parse-events: Create two hybrid hardware events kan.liang
2021-02-08 18:59   ` Arnaldo Carvalho de Melo
2021-02-09  0:23     ` Jin, Yao
2021-02-08 15:25 ` [PATCH 36/49] perf parse-events: Create two hybrid cache events kan.liang
2021-02-08 15:25 ` [PATCH 37/49] perf parse-events: Support hardware events inside PMU kan.liang
2021-02-08 15:25 ` [PATCH 38/49] perf list: Display pmu prefix for partially supported hybrid cache events kan.liang
2021-02-08 15:25 ` [PATCH 39/49] perf parse-events: Support hybrid raw events kan.liang
2021-02-08 19:07   ` Arnaldo Carvalho de Melo
2021-02-09  0:28     ` Jin, Yao
2021-02-08 15:25 ` [PATCH 40/49] perf stat: Support --cputype option for hybrid events kan.liang
2021-02-08 15:25 ` [PATCH 41/49] perf stat: Support metrics with " kan.liang
2021-02-08 15:25 ` [PATCH 42/49] perf evlist: Create two hybrid 'cycles' events by default kan.liang
2021-02-08 15:25 ` [PATCH 43/49] perf stat: Add default hybrid events kan.liang
2021-02-08 19:10   ` Arnaldo Carvalho de Melo
2021-02-09  0:36     ` Jin, Yao
2021-02-08 15:25 ` [PATCH 44/49] perf stat: Uniquify hybrid event name kan.liang
2021-02-08 15:25 ` [PATCH 45/49] perf stat: Merge event counts from all hybrid PMUs kan.liang
2021-02-08 15:25 ` [PATCH 46/49] perf stat: Filter out unmatched aggregation for hybrid event kan.liang
2021-02-08 19:16   ` Arnaldo Carvalho de Melo
2021-02-09  0:53     ` Jin, Yao
2021-02-08 15:25 ` [PATCH 47/49] perf evlist: Warn as events from different hybrid PMUs in a group kan.liang
2021-02-08 15:25 ` [PATCH 48/49] perf Documentation: Document intel-hybrid support kan.liang
2021-02-08 15:25 ` [PATCH 49/49] perf evsel: Adjust hybrid event and global event mixed group kan.liang
2021-02-08 19:12   ` Arnaldo Carvalho de Melo
2021-02-09  0:47     ` Jin, Yao
2021-02-11 11:40 ` [PATCH 00/49] Add Alder Lake support for perf Jiri Olsa
2021-02-11 16:22   ` Liang, Kan
2021-02-18  0:07     ` Jin, Yao
2021-03-04 15:50 ` Liang, Kan
2021-03-04 17:50   ` Peter Zijlstra
2021-03-05 11:14     ` Peter Zijlstra
2021-03-05 13:36       ` Liang, Kan

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