[PATCH 0/2] nvme: resync nvme-cli and align values

[PATCH 0/2] nvme: resync nvme-cli and align values

[Chaitanya Kulkarni]

Hi,

Resync the nvme-cli headers and align the enum values which matches the
rest of the enum definitions.

I've tested this patch with backporting the require commit that needed
nvme repo with nvme-5.12 branch to be in working condition.

-ck

Chaitanya Kulkarni (1):
  nvme: aligned all enum values

Max Gurtovoy (1):
  nvme: resync header file with common nvme-cli tool

 include/linux/nvme.h | 173 ++++++++++++++++++++++++++-----------------
 1 file changed, 104 insertions(+), 69 deletions(-)

-- 
2.22.1


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[PATCH 1/2] nvme: resync header file with common nvme-cli tool

[Chaitanya Kulkarni]

From: Max Gurtovoy <mgurtovoy@nvidia.com>

Import constant definitions that were added to nvme-cli and were not
added to Linux. This is the first step to align nvme.h files from Linux
kernel include/linux/nvme.h and nvme-cli linux/nvme.h.

Signed-off-by: Max Gurtovoy <mgurtovoy@nvidia.com>
Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
[ Shorten the comments for PMR and CMB which are common shortforms ]
---
 include/linux/nvme.h | 73 ++++++++++++++++++++++++++++++++------------
 1 file changed, 54 insertions(+), 19 deletions(-)

diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index b08787cd0881..3f162e34a2c0 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -113,21 +113,16 @@ enum {
 	NVME_REG_CMBSZ	= 0x003c,	/* Controller Memory Buffer Size */
 	NVME_REG_BPINFO	= 0x0040,	/* Boot Partition Information */
 	NVME_REG_BPRSEL	= 0x0044,	/* Boot Partition Read Select */
-	NVME_REG_BPMBL	= 0x0048,	/* Boot Partition Memory Buffer
-					 * Location
-					 */
-	NVME_REG_CMBMSC = 0x0050,	/* Controller Memory Buffer Memory
-					 * Space Control
-					 */
+	NVME_REG_BPMBL	= 0x0048,	/* Boot Partition Memory Buffer Location */
+	NVME_REG_CMBMSC	= 0x0050,	/* CMB Memory Space Control */
+	NVME_REG_CMBSTS	= 0x0058,	/* CMB Status */
+
 	NVME_REG_PMRCAP	= 0x0e00,	/* Persistent Memory Capabilities */
-	NVME_REG_PMRCTL	= 0x0e04,	/* Persistent Memory Region Control */
-	NVME_REG_PMRSTS	= 0x0e08,	/* Persistent Memory Region Status */
-	NVME_REG_PMREBS	= 0x0e0c,	/* Persistent Memory Region Elasticity
-					 * Buffer Size
-					 */
-	NVME_REG_PMRSWTP = 0x0e10,	/* Persistent Memory Region Sustained
-					 * Write Throughput
-					 */
+	NVME_REG_PMRCTL	= 0x0e04,	/* PMR Control */
+	NVME_REG_PMRSTS	= 0x0e08,	/* PMR Status */
+	NVME_REG_PMREBS	= 0x0e0c,	/* PMR Elasticity Buffer Size */
+	NVME_REG_PMRSWTP = 0x0e10,	/* PMR Sustained Write Throughput */
+	NVME_REG_PMRMSC = 0x0e14,	/* PMR Controller Memory Space Control */
 	NVME_REG_DBS	= 0x1000,	/* SQ 0 Tail Doorbell */
 };
 
@@ -142,6 +137,14 @@ enum {
 
 #define NVME_CMB_BIR(cmbloc)	((cmbloc) & 0x7)
 #define NVME_CMB_OFST(cmbloc)	(((cmbloc) >> 12) & 0xfffff)
+#define NVME_CMB_SZ(cmbsz)	(((cmbsz) >> 12) & 0xfffff)
+#define NVME_CMB_SZU(cmbsz)	(((cmbsz) >> 8) & 0xf)
+
+#define NVME_CMB_WDS(cmbsz)	((cmbsz) & 0x10)
+#define NVME_CMB_RDS(cmbsz)	((cmbsz) & 0x8)
+#define NVME_CMB_LISTS(cmbsz)	((cmbsz) & 0x4)
+#define NVME_CMB_CQS(cmbsz)	((cmbsz) & 0x2)
+#define NVME_CMB_SQS(cmbsz)	((cmbsz) & 0x1)
 
 enum {
 	NVME_CMBSZ_SQS		= 1 << 0,
@@ -244,7 +247,10 @@ struct nvme_id_ctrl {
 	__le32			rtd3e;
 	__le32			oaes;
 	__le32			ctratt;
-	__u8			rsvd100[28];
+	__le16			rrls;
+	__u8			rsvd102[9];
+	__u8			cntrltype;
+	char			fguid[16];
 	__le16			crdt1;
 	__le16			crdt2;
 	__le16			crdt3;
@@ -276,12 +282,14 @@ struct nvme_id_ctrl {
 	__le32			sanicap;
 	__le32			hmminds;
 	__le16			hmmaxd;
-	__u8			rsvd338[4];
+	__le16			nsetidmax;
+	__le16			endgidmax;
 	__u8			anatt;
 	__u8			anacap;
 	__le32			anagrpmax;
 	__le32			nanagrpid;
-	__u8			rsvd352[160];
+	__le32			pels;
+	__u8			rsvd356[156];
 	__u8			sqes;
 	__u8			cqes;
 	__le16			maxcmd;
@@ -295,7 +303,7 @@ struct nvme_id_ctrl {
 	__u8			nvscc;
 	__u8			nwpc;
 	__le16			acwu;
-	__u8			rsvd534[2];
+	__le16			ocfs;
 	__le32			sgls;
 	__le32			mnan;
 	__u8			rsvd544[224];
@@ -368,7 +376,10 @@ struct nvme_id_ns {
 	__le16			npdg;
 	__le16			npda;
 	__le16			nows;
-	__u8			rsvd74[18];
+	__le16			mssrl;
+	__le32			mcl;
+	__u8			msrc;
+	__u8			rsvd81[11];
 	__le32			anagrpid;
 	__u8			rsvd96[3];
 	__u8			nsattr;
@@ -410,8 +421,10 @@ enum {
 	NVME_ID_CNS_CTRL		= 0x01,
 	NVME_ID_CNS_NS_ACTIVE_LIST	= 0x02,
 	NVME_ID_CNS_NS_DESC_LIST	= 0x03,
+	NVME_ID_CNS_NVMSET_LIST		= 0x04,
 	NVME_ID_CNS_CS_NS		= 0x05,
 	NVME_ID_CNS_CS_CTRL		= 0x06,
+	NVME_ID_CNS_CS_NS_ACTIVE_LIST	= 0x07,
 	NVME_ID_CNS_NS_PRESENT_LIST	= 0x10,
 	NVME_ID_CNS_NS_PRESENT		= 0x11,
 	NVME_ID_CNS_CTRL_NS_LIST	= 0x12,
@@ -419,6 +432,10 @@ enum {
 	NVME_ID_CNS_SCNDRY_CTRL_LIST	= 0x15,
 	NVME_ID_CNS_NS_GRANULARITY	= 0x16,
 	NVME_ID_CNS_UUID_LIST		= 0x17,
+	NVME_ID_CNS_CSI_NS_PRESENT_LIST	= 0x1a,
+	NVME_ID_CNS_CSI_NS_PRESENT	= 0x1b,
+	NVME_ID_CNS_CSI			= 0x1c,
+
 };
 
 enum {
@@ -679,6 +696,7 @@ enum nvme_opcode {
 	nvme_cmd_resv_report	= 0x0e,
 	nvme_cmd_resv_acquire	= 0x11,
 	nvme_cmd_resv_release	= 0x15,
+	nvme_cmd_copy		= 0x19,
 	nvme_cmd_zone_mgmt_send	= 0x79,
 	nvme_cmd_zone_mgmt_recv	= 0x7a,
 	nvme_cmd_zone_append	= 0x7d,
@@ -1052,6 +1070,7 @@ enum {
 	NVME_FEAT_PLM_WINDOW	= 0x14,
 	NVME_FEAT_HOST_BEHAVIOR	= 0x16,
 	NVME_FEAT_SANITIZE	= 0x17,
+	NVME_FEAT_IOCS_PROFILE	= 0x19,
 	NVME_FEAT_SW_PROGRESS	= 0x80,
 	NVME_FEAT_HOST_ID	= 0x81,
 	NVME_FEAT_RESV_MASK	= 0x82,
@@ -1068,9 +1087,14 @@ enum {
 	NVME_LOG_TELEMETRY_HOST = 0x07,
 	NVME_LOG_TELEMETRY_CTRL = 0x08,
 	NVME_LOG_ENDURANCE_GROUP = 0x09,
+	NVME_LOG_PRELAT_PER_NVMSET	= 0x0a,
+	NVME_LOG_PRELAT_EVENT_AGG	= 0x0b,
 	NVME_LOG_ANA		= 0x0c,
+	NVME_LOG_PERSISTENT_EVENT   = 0x0d,
 	NVME_LOG_DISC		= 0x70,
 	NVME_LOG_RESERVATION	= 0x80,
+	NVME_LOG_SANITIZE	= 0x81,
+	NVME_LOG_ZONE_CHANGED_LIST = 0xbf,
 	NVME_FWACT_REPL		= (0 << 3),
 	NVME_FWACT_REPL_ACTV	= (1 << 3),
 	NVME_FWACT_ACTV		= (2 << 3),
@@ -1310,6 +1334,9 @@ struct nvmf_disc_rsp_page_entry {
 			__u16	pkey;
 			__u8	resv10[246];
 		} rdma;
+		struct tcp {
+			__u8	sectype;
+		} tcp;
 	} tsas;
 };
 
@@ -1542,6 +1569,14 @@ enum {
 	NVME_SC_ANA_GROUP_ID_INVALID	= 0x124,
 	NVME_SC_ANA_ATTACH_FAILED	= 0x125,
 
+	/*
+	 * Command Set Specific - Namespace Types commands:
+	 */
+	NVME_SC_IOCS_NOT_SUPPORTED	= 0x129,
+	NVME_SC_IOCS_NOT_ENABLED	= 0x12a,
+	NVME_SC_IOCS_COMBINATION_REJ	= 0x12b,
+	NVME_SC_INVALID_IOCS		= 0x12c,
+
 	/*
 	 * I/O Command Set Specific - NVM commands:
 	 */
-- 
2.22.1


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[PATCH 2/2] nvme: aligned all enum values

[Chaitanya Kulkarni]

Add extra tabs and align the values that matches the rest of the
enum definitions.

Signed-off-by: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
---
 include/linux/nvme.h | 108 +++++++++++++++++++++----------------------
 1 file changed, 54 insertions(+), 54 deletions(-)

diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 3f162e34a2c0..c0d7148f893a 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -1042,62 +1042,62 @@ enum nvme_admin_opcode {
 		nvme_admin_opcode_name(nvme_admin_get_lba_status))
 
 enum {
-	NVME_QUEUE_PHYS_CONTIG	= (1 << 0),
-	NVME_CQ_IRQ_ENABLED	= (1 << 1),
-	NVME_SQ_PRIO_URGENT	= (0 << 1),
-	NVME_SQ_PRIO_HIGH	= (1 << 1),
-	NVME_SQ_PRIO_MEDIUM	= (2 << 1),
-	NVME_SQ_PRIO_LOW	= (3 << 1),
-	NVME_FEAT_ARBITRATION	= 0x01,
-	NVME_FEAT_POWER_MGMT	= 0x02,
-	NVME_FEAT_LBA_RANGE	= 0x03,
-	NVME_FEAT_TEMP_THRESH	= 0x04,
-	NVME_FEAT_ERR_RECOVERY	= 0x05,
-	NVME_FEAT_VOLATILE_WC	= 0x06,
-	NVME_FEAT_NUM_QUEUES	= 0x07,
-	NVME_FEAT_IRQ_COALESCE	= 0x08,
-	NVME_FEAT_IRQ_CONFIG	= 0x09,
-	NVME_FEAT_WRITE_ATOMIC	= 0x0a,
-	NVME_FEAT_ASYNC_EVENT	= 0x0b,
-	NVME_FEAT_AUTO_PST	= 0x0c,
-	NVME_FEAT_HOST_MEM_BUF	= 0x0d,
-	NVME_FEAT_TIMESTAMP	= 0x0e,
-	NVME_FEAT_KATO		= 0x0f,
-	NVME_FEAT_HCTM		= 0x10,
-	NVME_FEAT_NOPSC		= 0x11,
-	NVME_FEAT_RRL		= 0x12,
-	NVME_FEAT_PLM_CONFIG	= 0x13,
-	NVME_FEAT_PLM_WINDOW	= 0x14,
-	NVME_FEAT_HOST_BEHAVIOR	= 0x16,
-	NVME_FEAT_SANITIZE	= 0x17,
-	NVME_FEAT_IOCS_PROFILE	= 0x19,
-	NVME_FEAT_SW_PROGRESS	= 0x80,
-	NVME_FEAT_HOST_ID	= 0x81,
-	NVME_FEAT_RESV_MASK	= 0x82,
-	NVME_FEAT_RESV_PERSIST	= 0x83,
-	NVME_FEAT_WRITE_PROTECT	= 0x84,
-	NVME_FEAT_VENDOR_START	= 0xC0,
-	NVME_FEAT_VENDOR_END	= 0xFF,
-	NVME_LOG_ERROR		= 0x01,
-	NVME_LOG_SMART		= 0x02,
-	NVME_LOG_FW_SLOT	= 0x03,
-	NVME_LOG_CHANGED_NS	= 0x04,
-	NVME_LOG_CMD_EFFECTS	= 0x05,
-	NVME_LOG_DEVICE_SELF_TEST = 0x06,
-	NVME_LOG_TELEMETRY_HOST = 0x07,
-	NVME_LOG_TELEMETRY_CTRL = 0x08,
-	NVME_LOG_ENDURANCE_GROUP = 0x09,
+	NVME_QUEUE_PHYS_CONTIG		= (1 << 0),
+	NVME_CQ_IRQ_ENABLED		= (1 << 1),
+	NVME_SQ_PRIO_URGENT		= (0 << 1),
+	NVME_SQ_PRIO_HIGH		= (1 << 1),
+	NVME_SQ_PRIO_MEDIUM		= (2 << 1),
+	NVME_SQ_PRIO_LOW		= (3 << 1),
+	NVME_FEAT_ARBITRATION		= 0x01,
+	NVME_FEAT_POWER_MGMT		= 0x02,
+	NVME_FEAT_LBA_RANGE		= 0x03,
+	NVME_FEAT_TEMP_THRESH		= 0x04,
+	NVME_FEAT_ERR_RECOVERY		= 0x05,
+	NVME_FEAT_VOLATILE_WC		= 0x06,
+	NVME_FEAT_NUM_QUEUES		= 0x07,
+	NVME_FEAT_IRQ_COALESCE		= 0x08,
+	NVME_FEAT_IRQ_CONFIG		= 0x09,
+	NVME_FEAT_WRITE_ATOMIC		= 0x0a,
+	NVME_FEAT_ASYNC_EVENT		= 0x0b,
+	NVME_FEAT_AUTO_PST		= 0x0c,
+	NVME_FEAT_HOST_MEM_BUF		= 0x0d,
+	NVME_FEAT_TIMESTAMP		= 0x0e,
+	NVME_FEAT_KATO			= 0x0f,
+	NVME_FEAT_HCTM			= 0x10,
+	NVME_FEAT_NOPSC			= 0x11,
+	NVME_FEAT_RRL			= 0x12,
+	NVME_FEAT_PLM_CONFIG		= 0x13,
+	NVME_FEAT_PLM_WINDOW		= 0x14,
+	NVME_FEAT_HOST_BEHAVIOR		= 0x16,
+	NVME_FEAT_SANITIZE		= 0x17,
+	NVME_FEAT_IOCS_PROFILE		= 0x19,
+	NVME_FEAT_SW_PROGRESS		= 0x80,
+	NVME_FEAT_HOST_ID		= 0x81,
+	NVME_FEAT_RESV_MASK		= 0x82,
+	NVME_FEAT_RESV_PERSIST		= 0x83,
+	NVME_FEAT_WRITE_PROTECT		= 0x84,
+	NVME_FEAT_VENDOR_START		= 0xC0,
+	NVME_FEAT_VENDOR_END		= 0xFF,
+	NVME_LOG_ERROR			= 0x01,
+	NVME_LOG_SMART			= 0x02,
+	NVME_LOG_FW_SLOT		= 0x03,
+	NVME_LOG_CHANGED_NS		= 0x04,
+	NVME_LOG_CMD_EFFECTS		= 0x05,
+	NVME_LOG_DEVICE_SELF_TEST	= 0x06,
+	NVME_LOG_TELEMETRY_HOST		= 0x07,
+	NVME_LOG_TELEMETRY_CTRL		= 0x08,
+	NVME_LOG_ENDURANCE_GROUP	= 0x09,
 	NVME_LOG_PRELAT_PER_NVMSET	= 0x0a,
 	NVME_LOG_PRELAT_EVENT_AGG	= 0x0b,
-	NVME_LOG_ANA		= 0x0c,
-	NVME_LOG_PERSISTENT_EVENT   = 0x0d,
-	NVME_LOG_DISC		= 0x70,
-	NVME_LOG_RESERVATION	= 0x80,
-	NVME_LOG_SANITIZE	= 0x81,
-	NVME_LOG_ZONE_CHANGED_LIST = 0xbf,
-	NVME_FWACT_REPL		= (0 << 3),
-	NVME_FWACT_REPL_ACTV	= (1 << 3),
-	NVME_FWACT_ACTV		= (2 << 3),
+	NVME_LOG_ANA			= 0x0c,
+	NVME_LOG_PERSISTENT_EVENT	= 0x0d,
+	NVME_LOG_DISC			= 0x70,
+	NVME_LOG_RESERVATION		= 0x80,
+	NVME_LOG_SANITIZE		= 0x81,
+	NVME_LOG_ZONE_CHANGED_LIST	= 0xbf,
+	NVME_FWACT_REPL			= (0 << 3),
+	NVME_FWACT_REPL_ACTV		= (1 << 3),
+	NVME_FWACT_ACTV			= (2 << 3),
 };
 
 /* NVMe Namespace Write Protect State */
-- 
2.22.1


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Re: [PATCH 0/2] nvme: resync nvme-cli and align values

[Christoph Hellwig]

Thanks,

applied to nvme-5.13.

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