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From: Boris Brezillon <boris.brezillon@collabora.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: miquel.raynal@bootlin.com, richard@nod.at, robh+dt@kernel.org,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	Daniele.Palmas@telit.com, bjorn.andersson@linaro.org
Subject: Re: [PATCH v4 2/3] dt-bindings: mtd: Add a property to declare secure regions in NAND chips
Date: Mon, 8 Mar 2021 10:10:59 +0100	[thread overview]
Message-ID: <20210308101059.08658fbe@collabora.com> (raw)
In-Reply-To: <20210308054447.28418-3-manivannan.sadhasivam@linaro.org>

On Mon,  8 Mar 2021 11:14:46 +0530
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote:

> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element like
> Trustzone. So the normal world software like Linux kernel should not
> touch these regions (including reading).
> 
> So let's add a property for declaring such secure regions so that the
> drivers can skip touching them.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  Documentation/devicetree/bindings/mtd/nand-controller.yaml | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index d0e422f4b3e0..15a674bedca3 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -143,6 +143,13 @@ patternProperties:
>            Ready/Busy pins. Active state refers to the NAND ready state and
>            should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted.
>  
> +      secure-regions:
> +        $ref: /schemas/types.yaml#/definitions/uint32-matrix
> +        description:
> +          Regions in the NAND chip which are protected using a secure element
> +          like Trustzone. This property contains the start address and size of
> +          the secure regions present.
> +

Since you declare this as a generic property, I think it'd be simpler
to do the check at the core level.

>      required:
>        - reg
>  


WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@collabora.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: miquel.raynal@bootlin.com, richard@nod.at, robh+dt@kernel.org,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	Daniele.Palmas@telit.com, bjorn.andersson@linaro.org
Subject: Re: [PATCH v4 2/3] dt-bindings: mtd: Add a property to declare secure regions in NAND chips
Date: Mon, 8 Mar 2021 10:10:59 +0100	[thread overview]
Message-ID: <20210308101059.08658fbe@collabora.com> (raw)
In-Reply-To: <20210308054447.28418-3-manivannan.sadhasivam@linaro.org>

On Mon,  8 Mar 2021 11:14:46 +0530
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote:

> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element like
> Trustzone. So the normal world software like Linux kernel should not
> touch these regions (including reading).
> 
> So let's add a property for declaring such secure regions so that the
> drivers can skip touching them.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  Documentation/devicetree/bindings/mtd/nand-controller.yaml | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index d0e422f4b3e0..15a674bedca3 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -143,6 +143,13 @@ patternProperties:
>            Ready/Busy pins. Active state refers to the NAND ready state and
>            should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted.
>  
> +      secure-regions:
> +        $ref: /schemas/types.yaml#/definitions/uint32-matrix
> +        description:
> +          Regions in the NAND chip which are protected using a secure element
> +          like Trustzone. This property contains the start address and size of
> +          the secure regions present.
> +

Since you declare this as a generic property, I think it'd be simpler
to do the check at the core level.

>      required:
>        - reg
>  


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  reply	other threads:[~2021-03-08  9:12 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-08  5:44 [PATCH v4 0/3] Add support for secure regions in Qcom NANDc driver Manivannan Sadhasivam
2021-03-08  5:44 ` Manivannan Sadhasivam
2021-03-08  5:44 ` [PATCH v4 1/3] dt-bindings: mtd: Convert Qcom NANDc binding to YAML Manivannan Sadhasivam
2021-03-08  5:44   ` Manivannan Sadhasivam
2021-03-08  5:44 ` [PATCH v4 2/3] dt-bindings: mtd: Add a property to declare secure regions in NAND chips Manivannan Sadhasivam
2021-03-08  5:44   ` Manivannan Sadhasivam
2021-03-08  9:10   ` Boris Brezillon [this message]
2021-03-08  9:10     ` Boris Brezillon
2021-03-08 13:31     ` Manivannan Sadhasivam
2021-03-08 13:31       ` Manivannan Sadhasivam
2021-03-09  7:57       ` Boris Brezillon
2021-03-09  7:57         ` Boris Brezillon
2021-03-08  5:44 ` [PATCH v4 3/3] mtd: rawnand: qcom: Add support for secure regions in NAND memory Manivannan Sadhasivam
2021-03-08  5:44   ` Manivannan Sadhasivam
2021-03-08  9:02   ` Boris Brezillon
2021-03-08  9:02     ` Boris Brezillon
2021-03-08 13:34     ` Manivannan Sadhasivam
2021-03-08 13:34       ` Manivannan Sadhasivam
2021-03-08 13:34       ` Manivannan Sadhasivam
2021-03-08 13:34         ` Manivannan Sadhasivam

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