All of lore.kernel.org
 help / color / mirror / Atom feed
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: heiko@sntech.de
Cc: linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	"Enric Balletbo i Serra" <enric.balletbo@collabora.com>,
	"Gaël PORTAY" <gael.portay@collabora.com>,
	"Rob Herring" <robh@kernel.org>,
	"MyungJoo Ham" <myungjoo.ham@samsung.com>,
	"Kyungmin Park" <kyungmin.park@samsung.com>,
	"Chanwoo Choi" <cw00.choi@samsung.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	linux-pm@vger.kernel.org (open list:DEVICE FREQUENCY (DEVFREQ)),
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE BINDINGS),
	linux-kernel@vger.kernel.org (open list)
Subject: [RESEND PATCH v5 1/4] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle.
Date: Tue,  9 Mar 2021 00:38:55 +0100	[thread overview]
Message-ID: <20210308233858.24741-1-daniel.lezcano@linaro.org> (raw)

From: Enric Balletbo i Serra <enric.balletbo@collabora.com>

The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
index a10d1f6d85c6..a41bcfef95c8 100644
--- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
+++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
@@ -12,6 +12,8 @@ Required properties:
 			 for details.
 - center-supply:	 DMC supply node.
 - status:		 Marks the node enabled/disabled.
+- rockchip,pmu:		 Phandle to the syscon managing the "PMU general register
+			 files".
 
 Optional properties:
 - interrupts:		 The CPU interrupt number. The interrupt specifier
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: heiko@sntech.de
Cc: linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	"Enric Balletbo i Serra" <enric.balletbo@collabora.com>,
	"Gaël PORTAY" <gael.portay@collabora.com>,
	"Rob Herring" <robh@kernel.org>,
	"MyungJoo Ham" <myungjoo.ham@samsung.com>,
	"Kyungmin Park" <kyungmin.park@samsung.com>,
	"Chanwoo Choi" <cw00.choi@samsung.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	linux-pm@vger.kernel.org (open list:DEVICE FREQUENCY (DEVFREQ)),
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE BINDINGS),
	linux-kernel@vger.kernel.org (open list)
Subject: [RESEND PATCH v5 1/4] dt-bindings: devfreq: rk3399_dmc: Add rockchip, pmu phandle.
Date: Tue,  9 Mar 2021 00:38:55 +0100	[thread overview]
Message-ID: <20210308233858.24741-1-daniel.lezcano@linaro.org> (raw)

From: Enric Balletbo i Serra <enric.balletbo@collabora.com>

The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
index a10d1f6d85c6..a41bcfef95c8 100644
--- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
+++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
@@ -12,6 +12,8 @@ Required properties:
 			 for details.
 - center-supply:	 DMC supply node.
 - status:		 Marks the node enabled/disabled.
+- rockchip,pmu:		 Phandle to the syscon managing the "PMU general register
+			 files".
 
 Optional properties:
 - interrupts:		 The CPU interrupt number. The interrupt specifier
-- 
2.17.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: heiko@sntech.de
Cc: linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	"Enric Balletbo i Serra" <enric.balletbo@collabora.com>,
	"Gaël PORTAY" <gael.portay@collabora.com>,
	"Rob Herring" <robh@kernel.org>,
	"MyungJoo Ham" <myungjoo.ham@samsung.com>,
	"Kyungmin Park" <kyungmin.park@samsung.com>,
	"Chanwoo Choi" <cw00.choi@samsung.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	linux-pm@vger.kernel.org (open list:DEVICE FREQUENCY (DEVFREQ)),
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE BINDINGS),
	linux-kernel@vger.kernel.org (open list)
Subject: [RESEND PATCH v5 1/4] dt-bindings: devfreq: rk3399_dmc: Add rockchip, pmu phandle.
Date: Tue,  9 Mar 2021 00:38:55 +0100	[thread overview]
Message-ID: <20210308233858.24741-1-daniel.lezcano@linaro.org> (raw)

From: Enric Balletbo i Serra <enric.balletbo@collabora.com>

The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
index a10d1f6d85c6..a41bcfef95c8 100644
--- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
+++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
@@ -12,6 +12,8 @@ Required properties:
 			 for details.
 - center-supply:	 DMC supply node.
 - status:		 Marks the node enabled/disabled.
+- rockchip,pmu:		 Phandle to the syscon managing the "PMU general register
+			 files".
 
 Optional properties:
 - interrupts:		 The CPU interrupt number. The interrupt specifier
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

             reply	other threads:[~2021-03-08 23:40 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20210308234058epcas1p43f00b9dcc3ea75e758ae2cf9a35d36ac@epcas1p4.samsung.com>
2021-03-08 23:38 ` Daniel Lezcano [this message]
2021-03-08 23:38   ` [RESEND PATCH v5 1/4] dt-bindings: devfreq: rk3399_dmc: Add rockchip, pmu phandle Daniel Lezcano
2021-03-08 23:38   ` Daniel Lezcano
2021-03-08 23:38   ` [RESEND PATCH v5 2/4] arm64: dts: rk3399: Add dfi and dmc nodes Daniel Lezcano
2021-03-08 23:38     ` Daniel Lezcano
2021-03-08 23:38     ` Daniel Lezcano
2021-03-09 11:42     ` Johan Jonker
2021-03-09 11:42       ` Johan Jonker
2021-03-09 11:42       ` Johan Jonker
2021-03-11 11:58       ` Daniel Lezcano
2021-03-11 11:58         ` Daniel Lezcano
2021-03-11 11:58         ` Daniel Lezcano
2021-03-11 12:05       ` Daniel Lezcano
2021-03-11 12:05         ` Daniel Lezcano
2021-03-11 12:05         ` Daniel Lezcano
2021-03-08 23:38   ` [RESEND PATCH v5 3/4] arm64: dts: rockchip: Enable dmc and dfi nodes on gru Daniel Lezcano
2021-03-08 23:38     ` Daniel Lezcano
2021-03-08 23:38     ` Daniel Lezcano
2021-03-08 23:38   ` [RESEND PATCH v5 4/4] dt-bindings: devfreq: rk3399_dmc: Remove references of unexistant defines Daniel Lezcano
2021-03-08 23:38     ` Daniel Lezcano
2021-03-08 23:38     ` Daniel Lezcano
2021-03-09 10:16     ` Chanwoo Choi
2021-03-09 10:16       ` Chanwoo Choi
2021-03-09 10:16       ` Chanwoo Choi
2021-03-08 23:42   ` [RESEND PATCH v5 1/4] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle Daniel Lezcano
2021-03-08 23:42     ` Daniel Lezcano
2021-03-08 23:42     ` Daniel Lezcano
2021-03-09 10:15   ` Chanwoo Choi
2021-03-09 10:15     ` Chanwoo Choi
2021-03-09 10:15     ` Chanwoo Choi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210308233858.24741-1-daniel.lezcano@linaro.org \
    --to=daniel.lezcano@linaro.org \
    --cc=cw00.choi@samsung.com \
    --cc=devicetree@vger.kernel.org \
    --cc=enric.balletbo@collabora.com \
    --cc=gael.portay@collabora.com \
    --cc=heiko@sntech.de \
    --cc=kyungmin.park@samsung.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=myungjoo.ham@samsung.com \
    --cc=robh+dt@kernel.org \
    --cc=robh@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.