From: Marc Zyngier <maz@kernel.org>
To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Cc: kernel-team@android.com, Will Deacon <will@kernel.org>
Subject: [PATCH 1/4] arm64: Use INIT_SCTLR_EL1_MMU_OFF to disable the MMU on CPU restart
Date: Wed, 10 Mar 2021 15:26:53 +0000 [thread overview]
Message-ID: <20210310152656.3821253-2-maz@kernel.org> (raw)
In-Reply-To: <20210310152656.3821253-1-maz@kernel.org>
Instead of doing a RMW on SCTLR_EL1 to disable the MMU, use the
existing define that loads the right set of bits.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kernel/cpu-reset.S | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S
index 37721eb6f9a1..d47ff63a5b66 100644
--- a/arch/arm64/kernel/cpu-reset.S
+++ b/arch/arm64/kernel/cpu-reset.S
@@ -30,10 +30,7 @@
* flat identity mapping.
*/
SYM_CODE_START(__cpu_soft_restart)
- /* Clear sctlr_el1 flags. */
- mrs x12, sctlr_el1
- mov_q x13, SCTLR_ELx_FLAGS
- bic x12, x12, x13
+ mov_q x12, INIT_SCTLR_EL1_MMU_OFF
pre_disable_mmu_workaround
/*
* either disable EL1&0 translation regime or disable EL2&0 translation
--
2.29.2
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>,
qperret@google.com, kernel-team@android.com
Subject: [PATCH 1/4] arm64: Use INIT_SCTLR_EL1_MMU_OFF to disable the MMU on CPU restart
Date: Wed, 10 Mar 2021 15:26:53 +0000 [thread overview]
Message-ID: <20210310152656.3821253-2-maz@kernel.org> (raw)
In-Reply-To: <20210310152656.3821253-1-maz@kernel.org>
Instead of doing a RMW on SCTLR_EL1 to disable the MMU, use the
existing define that loads the right set of bits.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kernel/cpu-reset.S | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S
index 37721eb6f9a1..d47ff63a5b66 100644
--- a/arch/arm64/kernel/cpu-reset.S
+++ b/arch/arm64/kernel/cpu-reset.S
@@ -30,10 +30,7 @@
* flat identity mapping.
*/
SYM_CODE_START(__cpu_soft_restart)
- /* Clear sctlr_el1 flags. */
- mrs x12, sctlr_el1
- mov_q x13, SCTLR_ELx_FLAGS
- bic x12, x12, x13
+ mov_q x12, INIT_SCTLR_EL1_MMU_OFF
pre_disable_mmu_workaround
/*
* either disable EL1&0 translation regime or disable EL2&0 translation
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>,
qperret@google.com, kernel-team@android.com
Subject: [PATCH 1/4] arm64: Use INIT_SCTLR_EL1_MMU_OFF to disable the MMU on CPU restart
Date: Wed, 10 Mar 2021 15:26:53 +0000 [thread overview]
Message-ID: <20210310152656.3821253-2-maz@kernel.org> (raw)
In-Reply-To: <20210310152656.3821253-1-maz@kernel.org>
Instead of doing a RMW on SCTLR_EL1 to disable the MMU, use the
existing define that loads the right set of bits.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kernel/cpu-reset.S | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S
index 37721eb6f9a1..d47ff63a5b66 100644
--- a/arch/arm64/kernel/cpu-reset.S
+++ b/arch/arm64/kernel/cpu-reset.S
@@ -30,10 +30,7 @@
* flat identity mapping.
*/
SYM_CODE_START(__cpu_soft_restart)
- /* Clear sctlr_el1 flags. */
- mrs x12, sctlr_el1
- mov_q x13, SCTLR_ELx_FLAGS
- bic x12, x12, x13
+ mov_q x12, INIT_SCTLR_EL1_MMU_OFF
pre_disable_mmu_workaround
/*
* either disable EL1&0 translation regime or disable EL2&0 translation
--
2.29.2
next prev parent reply other threads:[~2021-03-10 15:27 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 15:26 [PATCH 0/4] KVM: arm64: Running the EL2 nVHE code with WXN Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier [this message]
2021-03-10 15:26 ` [PATCH 1/4] arm64: Use INIT_SCTLR_EL1_MMU_OFF to disable the MMU on CPU restart Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:26 ` [PATCH 2/4] KVM: arm64: Use INIT_SCTLR_EL2_MMU_OFF to disable the MMU on KVM teardown Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:26 ` [PATCH 3/4] KVM: arm64: Rename SCTLR_ELx_FLAGS to SCTLR_EL2_FLAGS Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:46 ` Will Deacon
2021-03-10 15:46 ` Will Deacon
2021-03-10 15:46 ` Will Deacon
2021-03-10 16:05 ` Marc Zyngier
2021-03-10 16:05 ` Marc Zyngier
2021-03-10 16:05 ` Marc Zyngier
2021-03-10 16:15 ` Will Deacon
2021-03-10 16:15 ` Will Deacon
2021-03-10 16:15 ` Will Deacon
2021-03-10 17:49 ` Marc Zyngier
2021-03-10 17:49 ` Marc Zyngier
2021-03-10 17:49 ` Marc Zyngier
2021-03-10 18:20 ` Will Deacon
2021-03-10 18:20 ` Will Deacon
2021-03-10 18:20 ` Will Deacon
2021-03-11 11:35 ` Mark Rutland
2021-03-11 11:35 ` Mark Rutland
2021-03-11 11:35 ` Mark Rutland
2021-03-11 12:00 ` Mark Rutland
2021-03-11 12:00 ` Mark Rutland
2021-03-11 12:00 ` Mark Rutland
2021-03-10 15:26 ` [PATCH 4/4] KVM: arm64: Force SCTLR_EL2.WXN when running nVHE Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
2021-03-10 15:26 ` Marc Zyngier
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