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From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Ard Biesheuvel <ardb@kernel.org>,
	Mark Salter <msalter@redhat.com>, Will Deacon <will@kernel.org>,
	James Morse <james.morse@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Steve Capper <steve.capper@arm.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>
Subject: [PATCH 2/5] arm64: mm: remove unused __cpu_uses_extended_idmap[_level()]
Date: Wed, 10 Mar 2021 18:15:12 +0100	[thread overview]
Message-ID: <20210310171515.416643-3-ardb@kernel.org> (raw)
In-Reply-To: <20210310171515.416643-1-ardb@kernel.org>

These routines lost all existing users during the latest merge window so
we can remove them. This avoids the need to fix them in the context of
fixing a regression related to the ID map on 52-bit VA kernels.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/include/asm/mmu_context.h | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
index 0f467d550f27..bd02e99b1a4c 100644
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@ -63,20 +63,6 @@ static inline void cpu_switch_mm(pgd_t *pgd, struct mm_struct *mm)
 extern u64 idmap_t0sz;
 extern u64 idmap_ptrs_per_pgd;
 
-static inline bool __cpu_uses_extended_idmap(void)
-{
-	return unlikely(idmap_t0sz != TCR_T0SZ(vabits_actual));
-}
-
-/*
- * True if the extended ID map requires an extra level of translation table
- * to be configured.
- */
-static inline bool __cpu_uses_extended_idmap_level(void)
-{
-	return ARM64_HW_PGTABLE_LEVELS(64 - idmap_t0sz) > CONFIG_PGTABLE_LEVELS;
-}
-
 /*
  * Ensure TCR.T0SZ is set to the provided value.
  */
-- 
2.30.1


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  parent reply	other threads:[~2021-03-10 17:16 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-10 17:15 [PATCH 0/5] arm64: some 52-bit cleanups Ard Biesheuvel
2021-03-10 17:15 ` [PATCH 1/5] arm64: mm: use a 48-bit ID map when possible on 52-bit VA builds Ard Biesheuvel
2021-03-11  9:46   ` Will Deacon
2021-03-11 11:58     ` Ard Biesheuvel
2021-03-10 17:15 ` Ard Biesheuvel [this message]
2021-03-10 17:15 ` [PATCH 3/5] arm64: mm: use a compile time constant for vabits_actual when possible Ard Biesheuvel
2021-03-11  9:49   ` Will Deacon
2021-03-11 17:23     ` Ard Biesheuvel
2021-03-11 18:44       ` Will Deacon
2021-03-11 18:52         ` Ard Biesheuvel
2021-03-10 17:15 ` [PATCH 4/5] arm64: mm: get rid of idmap_ptrs_per_pgd handling Ard Biesheuvel
2021-03-10 17:15 ` [PATCH 5/5] arm64: mm: switch to 52-bit ID map on 52-bit VA capable systems Ard Biesheuvel
2021-03-11 13:26 ` [PATCH 0/5] arm64: some 52-bit cleanups Will Deacon

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