Re: [PATCH net-next 7/7] net: phy: marvell10g: support other MACTYPEs

Re: [PATCH net-next 7/7] net: phy: marvell10g: support other MACTYPEs

[kernel test robot]

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In-Reply-To: <20210324165023.32352-8-kabel@kernel.org>
References: <20210324165023.32352-8-kabel@kernel.org>
TO: "Marek Behún" <kabel@kernel.org>

Hi "Marek,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on net-next/master]

url:    https://github.com/0day-ci/linux/commits/Marek-Beh-n/net-phy-marvell10g-updates/20210325-005408
base:   https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 4c94fe88cde4bb5c8e1baa01106c4e6db1c75738
config: x86_64-randconfig-a011-20210323 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project a4fb88669cd98db6fef7dcac88e3ec425d40c00d)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install x86_64 cross compiling tool for clang build
        # apt-get install binutils-x86-64-linux-gnu
        # https://github.com/0day-ci/linux/commit/592e4ec68d174bb64651afd71262cee8eb0d5ff0
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Marek-Beh-n/net-phy-marvell10g-updates/20210325-005408
        git checkout 592e4ec68d174bb64651afd71262cee8eb0d5ff0
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/net/phy/marvell10g.o: warning: objtool: mv3310_read_status() falls through to next function mv3310_remove()

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

[-- Attachment #2: config.gz --]
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[PATCH net-next 0/7] net: phy: marvell10g updates

[Marek Behún]

Here are some updates for marvell10g PHY driver.

Marek Behún (7):
  net: phy: marvell10g: rename register
  net: phy: marvell10g: fix typo
  net: phy: marvell10g: allow 5gabse-r and usxgmii
  net: phy: marvell10g: add MACTYPE definitions for 88X3310/88X3310P
  net: phy: marvell10g: save MACTYPE instead of rate_matching boolean
  net: phy: marvell10g: support more rate matching modes
  net: phy: marvell10g: support other MACTYPEs

 drivers/net/phy/marvell10g.c | 102 +++++++++++++++++++++++------------
 1 file changed, 67 insertions(+), 35 deletions(-)

-- 
2.26.2

[PATCH net-next 7/7] net: phy: marvell10g: support other MACTYPEs

[Marek Behún]

Currently the only "changing" MACTYPE we support is when the PHY changes
between
  10gbase-r / 5gbase-r / 2500base-x / sgmii

Add support for
  xaui / 5gbase-r / 2500base-x / sgmii
  rxaui / 5gbase-r / 2500base-x / sgmii

Signed-off-by: Marek Behún <kabel@kernel.org>
---
 drivers/net/phy/marvell10g.c | 70 +++++++++++++++++++++---------------
 1 file changed, 41 insertions(+), 29 deletions(-)

diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index c764795a142a..a0fc74456d32 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -595,6 +595,10 @@ static int mv3310_aneg_done(struct phy_device *phydev)
 static void mv3310_update_interface(struct phy_device *phydev)
 {
 	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
+	phy_interface_t interface10g;
+
+	if (!phydev->link)
+		return;
 
 	/* In all of the "* with Rate Matching" modes the PHY interface is fixed
 	 * at 10Gb. The PHY adapts the rate to actual wire speed with help of
@@ -610,38 +614,46 @@ static void mv3310_update_interface(struct phy_device *phydev)
 	case MV_V2_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH:
 		phydev->interface = PHY_INTERFACE_MODE_RXAUI;
 		return;
-	default:
+	case MV_V2_PORT_CTRL_MACTYPE_USXGMII:
+		phydev->interface = PHY_INTERFACE_MODE_USXGMII;
+		return;
+	case MV_V2_PORT_CTRL_MACTYPE_10GBASER:
+	case MV_V2_PORT_CTRL_MACTYPE_10GBASER_NO_SGMII_AN:
+		interface10g = PHY_INTERFACE_MODE_10GBASER;
 		break;
+	case MV_V2_PORT_CTRL_MACTYPE_XAUI:
+		interface10g = PHY_INTERFACE_MODE_XAUI;
+		break;
+	case MV_V2_PORT_CTRL_MACTYPE_RXAUI:
+		interface10g = PHY_INTERFACE_MODE_RXAUI;
+		break;
+	default:
+		unreachable();
 	}
 
-	if ((phydev->interface == PHY_INTERFACE_MODE_SGMII ||
-	     phydev->interface == PHY_INTERFACE_MODE_2500BASEX ||
-	     phydev->interface == PHY_INTERFACE_MODE_10GBASER) &&
-	    phydev->link) {
-		/* The PHY automatically switches its serdes interface (and
-		 * active PHYXS instance) between Cisco SGMII, 10GBase-R and
-		 * 2500BaseX modes according to the speed.  Florian suggests
-		 * setting phydev->interface to communicate this to the MAC.
-		 * Only do this if we are already in one of the above modes.
-		 */
-		switch (phydev->speed) {
-		case SPEED_10000:
-			phydev->interface = PHY_INTERFACE_MODE_10GBASER;
-			break;
-		case SPEED_5000:
-			phydev->interface = PHY_INTERFACE_MODE_5GBASER;
-			break;
-		case SPEED_2500:
-			phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
-			break;
-		case SPEED_1000:
-		case SPEED_100:
-		case SPEED_10:
-			phydev->interface = PHY_INTERFACE_MODE_SGMII;
-			break;
-		default:
-			break;
-		}
+	/* The PHY automatically switches its serdes interface (and active PHYXS
+	 * instance) between Cisco SGMII, 2500BaseX, 5GBase-R and 10GBase-R /
+	 * xaui / rxaui modes according to the speed.
+	 * Florian suggests setting phydev->interface to communicate this to the
+	 * MAC. Only do this if we are already in one of the above modes.
+	 */
+	switch (phydev->speed) {
+	case SPEED_10000:
+		phydev->interface = interface10g;
+		break;
+	case SPEED_5000:
+		phydev->interface = PHY_INTERFACE_MODE_5GBASER;
+		break;
+	case SPEED_2500:
+		phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
+		break;
+	case SPEED_1000:
+	case SPEED_100:
+	case SPEED_10:
+		phydev->interface = PHY_INTERFACE_MODE_SGMII;
+		break;
+	default:
+		break;
 	}
 }
 
-- 
2.26.2