All of lore.kernel.org
 help / color / mirror / Atom feed
From: Lecopzer Chen <lecopzer.chen@mediatek.com>
To: <maz@kernel.org>
Cc: <julien.thierry.kdev@gmail.com>, <lecopzer.chen@mediatek.com>,
	<lecopzer@gmail.com>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <lorenzo.pieralisi@arm.com>,
	<tglx@linutronix.de>, <yj.chiang@mediatek.com>
Subject: Re: [PATCH] irqchip/gic-v3: Fix IPRIORITYR can't perform byte operations in GIC-600
Date: Tue, 30 Mar 2021 22:24:40 +0800	[thread overview]
Message-ID: <20210330142440.30119-1-lecopzer.chen@mediatek.com> (raw)
In-Reply-To: <87eefwrash.wl-maz@kernel.org>

[...]
> > > > 
> > > > From the architecture spec:
> > > > 
> > > > <quote>
> > > > 11.1.3 GIC memory-mapped register access
> > > > 
> > > > In any system, access to the following registers must be supported:
> > > > 
> > > > [...]
> > > > * Byte accesses to:
> > > > 	- GICD_IPRIORITYR<n>.
> > > > 	- GICD_ITARGETSR<n>.
> > > > 	- GICD_SPENDSGIR<n>.
> > > > 	- GICD_CPENDSGIR<n>.
> > > > 	- GICR_IPRIORITYR<n>.
> > > > </quote>
> > > > 
> > > > So if GIC600 doesn't follow this architectural requirement, this is a
> > > > HW erratum, and I want an actual description of the HW issue together
> > > > with an erratum number.
> > > > 
> > > > Lorenzo, can you please investigate on your side?
> > > 
> > > Sure - I will look into it and report back.
> > 
> > Checked - I don't think this patch is needed so it should be dropped and
> > a follow-up discussion can continue in the relevant/appropriate forum -
> > if there is anything left to discuss.
> 
> Thanks for having had a look. This really smells like an integration
> issue rather than an actual GIC bug.
> 
> Lecopzer, please check with your HW people and potentially ARM, as I
> think you are looking at the wrong problem.

Thanks a lot for the suggestion and checking,

I think I'll back to disscuss with ARM and our HW team to figure out
the previous answer from ARM Support in detail.

Thanks again!


Lecopzer
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Lecopzer Chen <lecopzer.chen@mediatek.com>
To: <maz@kernel.org>
Cc: <julien.thierry.kdev@gmail.com>, <lecopzer.chen@mediatek.com>,
	<lecopzer@gmail.com>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <lorenzo.pieralisi@arm.com>,
	<tglx@linutronix.de>, <yj.chiang@mediatek.com>
Subject: Re: [PATCH] irqchip/gic-v3: Fix IPRIORITYR can't perform byte operations in GIC-600
Date: Tue, 30 Mar 2021 22:24:40 +0800	[thread overview]
Message-ID: <20210330142440.30119-1-lecopzer.chen@mediatek.com> (raw)
In-Reply-To: <87eefwrash.wl-maz@kernel.org>

[...]
> > > > 
> > > > From the architecture spec:
> > > > 
> > > > <quote>
> > > > 11.1.3 GIC memory-mapped register access
> > > > 
> > > > In any system, access to the following registers must be supported:
> > > > 
> > > > [...]
> > > > * Byte accesses to:
> > > > 	- GICD_IPRIORITYR<n>.
> > > > 	- GICD_ITARGETSR<n>.
> > > > 	- GICD_SPENDSGIR<n>.
> > > > 	- GICD_CPENDSGIR<n>.
> > > > 	- GICR_IPRIORITYR<n>.
> > > > </quote>
> > > > 
> > > > So if GIC600 doesn't follow this architectural requirement, this is a
> > > > HW erratum, and I want an actual description of the HW issue together
> > > > with an erratum number.
> > > > 
> > > > Lorenzo, can you please investigate on your side?
> > > 
> > > Sure - I will look into it and report back.
> > 
> > Checked - I don't think this patch is needed so it should be dropped and
> > a follow-up discussion can continue in the relevant/appropriate forum -
> > if there is anything left to discuss.
> 
> Thanks for having had a look. This really smells like an integration
> issue rather than an actual GIC bug.
> 
> Lecopzer, please check with your HW people and potentially ARM, as I
> think you are looking at the wrong problem.

Thanks a lot for the suggestion and checking,

I think I'll back to disscuss with ARM and our HW team to figure out
the previous answer from ARM Support in detail.

Thanks again!


Lecopzer

  reply	other threads:[~2021-03-30 14:26 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-30 10:06 [PATCH] irqchip/gic-v3: Fix IPRIORITYR can't perform byte operations in GIC-600 Lecopzer Chen
2021-03-30 10:06 ` Lecopzer Chen
2021-03-30 10:33 ` Marc Zyngier
2021-03-30 10:33   ` Marc Zyngier
2021-03-30 11:05   ` Lorenzo Pieralisi
2021-03-30 11:05     ` Lorenzo Pieralisi
2021-03-30 13:06     ` Lorenzo Pieralisi
2021-03-30 13:06       ` Lorenzo Pieralisi
2021-03-30 14:11       ` Marc Zyngier
2021-03-30 14:11         ` Marc Zyngier
2021-03-30 14:24         ` Lecopzer Chen [this message]
2021-03-30 14:24           ` Lecopzer Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210330142440.30119-1-lecopzer.chen@mediatek.com \
    --to=lecopzer.chen@mediatek.com \
    --cc=julien.thierry.kdev@gmail.com \
    --cc=lecopzer@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=maz@kernel.org \
    --cc=tglx@linutronix.de \
    --cc=yj.chiang@mediatek.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.