[linux-stable-rc:linux-4.9.y 1825/2149] drivers/spi/spi-s3c24xx-fiq.S:52: Error: bad instruction `subsne pc, lr, #4'

[kernel test robot <lkp@intel.com>]

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tree:   https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-4.9.y
head:   1872b07a2ec0357e1349cc0081b182dd0b3e9dd7
commit: bc690c8239c3646434e19792851e825fafdb2782 [1825/2149] ARM: s3c: fix fiq for clang IAS
config: arm-randconfig-r033-20210401 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git/commit/?id=bc690c8239c3646434e19792851e825fafdb2782
        git remote add linux-stable-rc https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
        git fetch --no-tags linux-stable-rc linux-4.9.y
        git checkout bc690c8239c3646434e19792851e825fafdb2782
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-7.5.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/spi/spi-s3c24xx-fiq.S: Assembler messages:
>> drivers/spi/spi-s3c24xx-fiq.S:52: Error: bad instruction `subsne pc,lr,#4'
   drivers/spi/spi-s3c24xx-fiq.S:78: Error: bad instruction `subsne pc,lr,#4'
   drivers/spi/spi-s3c24xx-fiq.S:102: Error: bad instruction `subsne pc,lr,#4'


vim +52 drivers/spi/spi-s3c24xx-fiq.S

    21	
    22		.text
    23	
    24		@ entry to these routines is as follows, with the register names
    25		@ defined in fiq.h so that they can be shared with the C files which
    26		@ setup the calling registers.
    27		@
    28		@ fiq_rirq	The base of the IRQ registers to find S3C2410_SRCPND
    29		@ fiq_rtmp	Temporary register to hold tx/rx data
    30		@ fiq_rspi	The base of the SPI register block
    31		@ fiq_rtx	The tx buffer pointer
    32		@ fiq_rrx	The rx buffer pointer
    33		@ fiq_rcount	The number of bytes to move
    34	
    35		@ each entry starts with a word entry of how long it is
    36		@ and an offset to the irq acknowledgment word
    37	
    38	ENTRY(s3c24xx_spi_fiq_rx)
    39		.word	fiq_rx_end - fiq_rx_start
    40		.word	fiq_rx_irq_ack - fiq_rx_start
    41	fiq_rx_start:
    42		ldr	fiq_rtmp, fiq_rx_irq_ack
    43		str	fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
    44	
    45		ldrb	fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
    46		strb	fiq_rtmp, [ fiq_rrx ], #1
    47	
    48		mov	fiq_rtmp, #0xff
    49		strb	fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
    50	
    51		subs	fiq_rcount, fiq_rcount, #1
  > 52		subsne	pc, lr, #4		@@ return, still have work to do
    53	
    54		@@ set IRQ controller so that next op will trigger IRQ
    55		mov	fiq_rtmp, #0
    56		str	fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
    57		subs	pc, lr, #4
    58	
    59	fiq_rx_irq_ack:
    60		.word	0
    61	fiq_rx_end:
    62	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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