From: Segher Boessenkool <segher@kernel.crashing.org>
To: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 1/2] powerpc/bitops: Use immediate operand when possible
Date: Mon, 12 Apr 2021 16:54:28 -0500 [thread overview]
Message-ID: <20210412215428.GM26583@gate.crashing.org> (raw)
In-Reply-To: <09da6fec57792d6559d1ea64e00be9870b02dab4.1617896018.git.christophe.leroy@csgroup.eu>
Hi!
On Thu, Apr 08, 2021 at 03:33:44PM +0000, Christophe Leroy wrote:
> For clear bits, on 32 bits 'rlwinm' can be used instead or 'andc' for
> when all bits to be cleared are consecutive.
Also on 64-bits, as long as both the top and bottom bits are in the low
32-bit half (for 32 bit mode, it can wrap as well).
> For the time being only
> handle the single bit case, which we detect by checking whether the
> mask is a power of two.
You could look at rs6000_is_valid_mask in GCC:
<https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/rs6000/rs6000.c;h=48b8efd732b251c059628096314848305deb0c0b;hb=HEAD#l11148>
used by rs6000_is_valid_and_mask immediately after it. You probably
want to allow only rlwinm in your case, and please note this checks if
something is a valid mask, not the inverse of a valid mask (as you
want here).
So yes this is pretty involved :-)
Your patch looks good btw. But please use "n", not "i", as constraint?
Segher
WARNING: multiple messages have this Message-ID (diff)
From: Segher Boessenkool <segher@kernel.crashing.org>
To: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 1/2] powerpc/bitops: Use immediate operand when possible
Date: Mon, 12 Apr 2021 16:54:28 -0500 [thread overview]
Message-ID: <20210412215428.GM26583@gate.crashing.org> (raw)
In-Reply-To: <09da6fec57792d6559d1ea64e00be9870b02dab4.1617896018.git.christophe.leroy@csgroup.eu>
Hi!
On Thu, Apr 08, 2021 at 03:33:44PM +0000, Christophe Leroy wrote:
> For clear bits, on 32 bits 'rlwinm' can be used instead or 'andc' for
> when all bits to be cleared are consecutive.
Also on 64-bits, as long as both the top and bottom bits are in the low
32-bit half (for 32 bit mode, it can wrap as well).
> For the time being only
> handle the single bit case, which we detect by checking whether the
> mask is a power of two.
You could look at rs6000_is_valid_mask in GCC:
<https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/rs6000/rs6000.c;h=48b8efd732b251c059628096314848305deb0c0b;hb=HEAD#l11148>
used by rs6000_is_valid_and_mask immediately after it. You probably
want to allow only rlwinm in your case, and please note this checks if
something is a valid mask, not the inverse of a valid mask (as you
want here).
So yes this is pretty involved :-)
Your patch looks good btw. But please use "n", not "i", as constraint?
Segher
next prev parent reply other threads:[~2021-04-12 21:57 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-08 15:33 [PATCH v1 1/2] powerpc/bitops: Use immediate operand when possible Christophe Leroy
2021-04-08 15:33 ` Christophe Leroy
2021-04-08 15:33 ` [PATCH v1 2/2] powerpc/atomics: " Christophe Leroy
2021-04-08 15:33 ` Christophe Leroy
2021-04-12 22:08 ` Segher Boessenkool
2021-04-12 22:08 ` Segher Boessenkool
2021-04-13 16:36 ` Christophe Leroy
2021-04-13 16:36 ` Christophe Leroy
2021-04-12 21:54 ` Segher Boessenkool [this message]
2021-04-12 21:54 ` [PATCH v1 1/2] powerpc/bitops: " Segher Boessenkool
2021-04-13 16:33 ` Christophe Leroy
2021-04-13 16:33 ` Christophe Leroy
2021-04-13 21:58 ` Segher Boessenkool
2021-04-13 21:58 ` Segher Boessenkool
2021-04-14 2:01 ` Nicholas Piggin
2021-04-14 2:01 ` Nicholas Piggin
2021-04-14 12:24 ` Segher Boessenkool
2021-04-14 12:24 ` Segher Boessenkool
2021-04-14 12:42 ` Christophe Leroy
2021-04-14 12:42 ` Christophe Leroy
2021-04-14 15:19 ` Segher Boessenkool
2021-04-14 15:19 ` Segher Boessenkool
2021-04-14 15:32 ` David Laight
2021-04-14 15:32 ` David Laight
2021-04-14 17:20 ` Segher Boessenkool
2021-04-14 17:20 ` Segher Boessenkool
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