* [freescale-fslc:pr/317 13/48] drivers/pci/controller/dwc/pci-imx6.c:2924:11: warning: variable 'ret' set but not used
@ 2021-04-27 16:42 kernel test robot
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2021-04-27 16:42 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 4955 bytes --]
tree: https://github.com/Freescale/linux-fslc pr/317
head: cffe4fb95c43405f2fe3ceab81948a12c8769724
commit: a32bd4692437b1a2fc977fc8b1302e6107b2f0d6 [13/48] MLK-25283-4 PCI: imx: adjust the l1ss support to proper place
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/Freescale/linux-fslc/commit/a32bd4692437b1a2fc977fc8b1302e6107b2f0d6
git remote add freescale-fslc https://github.com/Freescale/linux-fslc
git fetch --no-tags freescale-fslc pr/317
git checkout a32bd4692437b1a2fc977fc8b1302e6107b2f0d6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross W=1 ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/pci/controller/dwc/pci-imx6.c: In function 'imx6_pcie_l1ss_quirk':
>> drivers/pci/controller/dwc/pci-imx6.c:2924:11: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
2924 | int ttl, ret;
| ^~~
Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for GPIO_MXC
Depends on GPIOLIB && HAS_IOMEM && ARCH_MXC
Selected by
- GPIO_MXC_PAD_WAKEUP && GPIOLIB && HAS_IOMEM && IMX_SCU
WARNING: unmet direct dependencies detected for PCIE_MOBIVEIL_HOST
Depends on PCI && PCI_MSI_IRQ_DOMAIN
Selected by
- PCIE_MOBIVEIL_PLAT && PCI && (ARCH_ZYNQMP || COMPILE_TEST && OF
vim +/ret +2924 drivers/pci/controller/dwc/pci-imx6.c
2889
2890 static void imx6_pcie_quirk(struct pci_dev *dev)
2891 {
2892 struct pci_bus *bus = dev->bus;
2893 struct pcie_port *pp = bus->sysdata;
2894
2895 /* Bus parent is the PCI bridge, its parent is this platform driver */
2896 if (!bus->dev.parent || !bus->dev.parent->parent)
2897 return;
2898
2899 /* Make sure we only quirk devices associated with this driver */
2900 if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver)
2901 return;
2902
2903 if (bus->number == pp->root_bus_nr) {
2904 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
2905 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
2906
2907 /*
2908 * Limit config length to avoid the kernel reading beyond
2909 * the register set and causing an abort on i.MX 6Quad
2910 */
2911 if (imx6_pcie->drvdata->dbi_length) {
2912 dev->cfg_size = imx6_pcie->drvdata->dbi_length;
2913 dev_info(&dev->dev, "Limiting cfg_size to %d\n",
2914 dev->cfg_size);
2915 }
2916 }
2917 }
2918 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd,
2919 PCI_CLASS_BRIDGE_PCI, 8, imx6_pcie_quirk);
2920
2921 static void imx6_pcie_l1ss_quirk(struct pci_dev *dev)
2922 {
2923 u32 reg, rc_l1sub, ep_l1sub, header;
> 2924 int ttl, ret;
2925 int pos = PCI_CFG_SPACE_SIZE;
2926 struct pci_bus *bus = dev->bus;
2927 struct pcie_port *pp = bus->sysdata;
2928 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
2929 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
2930
2931 /* Return directly, if the L1SS is not supported by RC */
2932 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_L1SS))
2933 return;
2934
2935 reg = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
2936 rc_l1sub = dw_pcie_readl_dbi(pci, reg + PCI_L1SS_CAP);
2937
2938 /* minimum 8 bytes per capability */
2939 ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
2940 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
2941 /*
2942 * If we have no capabilities, this is indicated by cap ID,
2943 * cap version and next pointer all being 0.
2944 */
2945 if (header == 0)
2946 return;
2947
2948 while (ttl-- > 0) {
2949 if (PCI_EXT_CAP_ID(header) == PCI_EXT_CAP_ID_L1SS && pos != 0)
2950 break;
2951
2952 pos = PCI_EXT_CAP_NEXT(header);
2953 if (pos < PCI_CFG_SPACE_SIZE)
2954 break;
2955
2956 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
2957 }
2958 ret = dw_pcie_read(pp->va_cfg0_base + pos + PCI_L1SS_CAP, 4, &ep_l1sub);
2959
2960 if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) {
2961 imx6_pcie->l1ss_clkreq = 1;
2962 imx6_pcie_clkreq_enable(imx6_pcie);
2963 } else {
2964 imx6_pcie->l1ss_clkreq = 0;
2965 }
2966 }
2967 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, imx6_pcie_l1ss_quirk);
2968
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 64510 bytes --]
^ permalink raw reply [flat|nested] 2+ messages in thread
* [freescale-fslc:pr/317 13/48] drivers/pci/controller/dwc/pci-imx6.c:2924:11: warning: variable 'ret' set but not used
@ 2021-06-06 3:31 kernel test robot
0 siblings, 0 replies; 2+ messages in thread
From: kernel test robot @ 2021-06-06 3:31 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 5399 bytes --]
tree: https://github.com/Freescale/linux-fslc pr/317
head: cffe4fb95c43405f2fe3ceab81948a12c8769724
commit: a32bd4692437b1a2fc977fc8b1302e6107b2f0d6 [13/48] MLK-25283-4 PCI: imx: adjust the l1ss support to proper place
config: x86_64-randconfig-a012-20210606 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 551a697c5cf33275b66add4fc467fcf59084cffb)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/Freescale/linux-fslc/commit/a32bd4692437b1a2fc977fc8b1302e6107b2f0d6
git remote add freescale-fslc https://github.com/Freescale/linux-fslc
git fetch --no-tags freescale-fslc pr/317
git checkout a32bd4692437b1a2fc977fc8b1302e6107b2f0d6
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/pci/controller/dwc/pci-imx6.c:2960:29: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand]
if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) {
^ ~~~~~~~~~~~~~~~~~~~~~
drivers/pci/controller/dwc/pci-imx6.c:2960:29: note: use '&' for a bitwise operation
if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) {
^~
&
drivers/pci/controller/dwc/pci-imx6.c:2960:29: note: remove constant to silence this warning
if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) {
~^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/pci/controller/dwc/pci-imx6.c:2924:11: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
int ttl, ret;
^
2 warnings generated.
vim +/ret +2924 drivers/pci/controller/dwc/pci-imx6.c
2889
2890 static void imx6_pcie_quirk(struct pci_dev *dev)
2891 {
2892 struct pci_bus *bus = dev->bus;
2893 struct pcie_port *pp = bus->sysdata;
2894
2895 /* Bus parent is the PCI bridge, its parent is this platform driver */
2896 if (!bus->dev.parent || !bus->dev.parent->parent)
2897 return;
2898
2899 /* Make sure we only quirk devices associated with this driver */
2900 if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver)
2901 return;
2902
2903 if (bus->number == pp->root_bus_nr) {
2904 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
2905 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
2906
2907 /*
2908 * Limit config length to avoid the kernel reading beyond
2909 * the register set and causing an abort on i.MX 6Quad
2910 */
2911 if (imx6_pcie->drvdata->dbi_length) {
2912 dev->cfg_size = imx6_pcie->drvdata->dbi_length;
2913 dev_info(&dev->dev, "Limiting cfg_size to %d\n",
2914 dev->cfg_size);
2915 }
2916 }
2917 }
2918 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd,
2919 PCI_CLASS_BRIDGE_PCI, 8, imx6_pcie_quirk);
2920
2921 static void imx6_pcie_l1ss_quirk(struct pci_dev *dev)
2922 {
2923 u32 reg, rc_l1sub, ep_l1sub, header;
> 2924 int ttl, ret;
2925 int pos = PCI_CFG_SPACE_SIZE;
2926 struct pci_bus *bus = dev->bus;
2927 struct pcie_port *pp = bus->sysdata;
2928 struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
2929 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
2930
2931 /* Return directly, if the L1SS is not supported by RC */
2932 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_L1SS))
2933 return;
2934
2935 reg = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
2936 rc_l1sub = dw_pcie_readl_dbi(pci, reg + PCI_L1SS_CAP);
2937
2938 /* minimum 8 bytes per capability */
2939 ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
2940 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
2941 /*
2942 * If we have no capabilities, this is indicated by cap ID,
2943 * cap version and next pointer all being 0.
2944 */
2945 if (header == 0)
2946 return;
2947
2948 while (ttl-- > 0) {
2949 if (PCI_EXT_CAP_ID(header) == PCI_EXT_CAP_ID_L1SS && pos != 0)
2950 break;
2951
2952 pos = PCI_EXT_CAP_NEXT(header);
2953 if (pos < PCI_CFG_SPACE_SIZE)
2954 break;
2955
2956 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header);
2957 }
2958 ret = dw_pcie_read(pp->va_cfg0_base + pos + PCI_L1SS_CAP, 4, &ep_l1sub);
2959
2960 if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) {
2961 imx6_pcie->l1ss_clkreq = 1;
2962 imx6_pcie_clkreq_enable(imx6_pcie);
2963 } else {
2964 imx6_pcie->l1ss_clkreq = 0;
2965 }
2966 }
2967 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, imx6_pcie_l1ss_quirk);
2968
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 39970 bytes --]
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