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From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [RFC 6/8] media: v4l2-dv-timings: Add more CEA/CTA-861 video format timings
Date: Thu, 29 Apr 2021 07:13:28 +0800	[thread overview]
Message-ID: <202104290735.piDdowap-lkp@intel.com> (raw)
In-Reply-To: <821e6f76310316cd84c3be47581c92b001e5d4ca.1618937288.git.nelson.costa@synopsys.com>

[-- Attachment #1: Type: text/plain, Size: 14229 bytes --]

Hi Nelson,

[FYI, it's a private test report for your RFC patch.]
[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on linux/master linus/master v5.12 next-20210428]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Nelson-Costa/Add-Synopsys-DesignWare-HDMI-RX-Controller-and-PHY-drivers/20210428-232828
base:   git://linuxtv.org/media_tree.git master
config: i386-randconfig-p001-20210428 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/a0e7878053f9c2570d83cc3165c2ec58b8aa6526
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Nelson-Costa/Add-Synopsys-DesignWare-HDMI-RX-Controller-and-PHY-drivers/20210428-232828
        git checkout a0e7878053f9c2570d83cc3165c2ec58b8aa6526
        # save the attached .config to linux build tree
        make W=1 W=1 ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/media/v4l2-core/v4l2-dv-timings.c:252:2: warning: this decimal constant is unsigned only in ISO C90
     252 |  V4L2_DV_BT_CEA_7680X4320P48_PA16_9,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:253:2: warning: this decimal constant is unsigned only in ISO C90
     253 |  V4L2_DV_BT_CEA_7680X4320P50_PA16_9,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:254:2: warning: this decimal constant is unsigned only in ISO C90
     254 |  V4L2_DV_BT_CEA_7680X4320P60_PA16_9,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:260:2: warning: this decimal constant is unsigned only in ISO C90
     260 |  V4L2_DV_BT_CEA_7680X4320P48_PA64_27,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:261:2: warning: this decimal constant is unsigned only in ISO C90
     261 |  V4L2_DV_BT_CEA_7680X4320P50_PA64_27,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:262:2: warning: this decimal constant is unsigned only in ISO C90
     262 |  V4L2_DV_BT_CEA_7680X4320P60_PA64_27,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:268:2: warning: this decimal constant is unsigned only in ISO C90
     268 |  V4L2_DV_BT_CEA_10240X4320P48_PA64_27,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:269:2: warning: this decimal constant is unsigned only in ISO C90
     269 |  V4L2_DV_BT_CEA_10240X4320P50_PA64_27,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/media/v4l2-core/v4l2-dv-timings.c:270:2: warning: this decimal constant is unsigned only in ISO C90
     270 |  V4L2_DV_BT_CEA_10240X4320P60_PA64_27,
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


vim +252 drivers/media/v4l2-core/v4l2-dv-timings.c

    23	
    24	const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
    25		V4L2_DV_BT_CEA_640X480P59_94,
    26		V4L2_DV_BT_CEA_720X480I59_94,
    27		V4L2_DV_BT_CEA_720X480P59_94,
    28		V4L2_DV_BT_CEA_720X576I50,
    29		V4L2_DV_BT_CEA_720X576P50,
    30		V4L2_DV_BT_CEA_1280X720P24,
    31		V4L2_DV_BT_CEA_1280X720P25,
    32		V4L2_DV_BT_CEA_1280X720P30,
    33		V4L2_DV_BT_CEA_1280X720P50,
    34		V4L2_DV_BT_CEA_1280X720P60,
    35		V4L2_DV_BT_CEA_1920X1080P24,
    36		V4L2_DV_BT_CEA_1920X1080P25,
    37		V4L2_DV_BT_CEA_1920X1080P30,
    38		V4L2_DV_BT_CEA_1920X1080I50,
    39		V4L2_DV_BT_CEA_1920X1080P50,
    40		V4L2_DV_BT_CEA_1920X1080I60,
    41		V4L2_DV_BT_CEA_1920X1080P60,
    42		V4L2_DV_BT_DMT_640X350P85,
    43		V4L2_DV_BT_DMT_640X400P85,
    44		V4L2_DV_BT_DMT_720X400P85,
    45		V4L2_DV_BT_DMT_640X480P72,
    46		V4L2_DV_BT_DMT_640X480P75,
    47		V4L2_DV_BT_DMT_640X480P85,
    48		V4L2_DV_BT_DMT_800X600P56,
    49		V4L2_DV_BT_DMT_800X600P60,
    50		V4L2_DV_BT_DMT_800X600P72,
    51		V4L2_DV_BT_DMT_800X600P75,
    52		V4L2_DV_BT_DMT_800X600P85,
    53		V4L2_DV_BT_DMT_800X600P120_RB,
    54		V4L2_DV_BT_DMT_848X480P60,
    55		V4L2_DV_BT_DMT_1024X768I43,
    56		V4L2_DV_BT_DMT_1024X768P60,
    57		V4L2_DV_BT_DMT_1024X768P70,
    58		V4L2_DV_BT_DMT_1024X768P75,
    59		V4L2_DV_BT_DMT_1024X768P85,
    60		V4L2_DV_BT_DMT_1024X768P120_RB,
    61		V4L2_DV_BT_DMT_1152X864P75,
    62		V4L2_DV_BT_DMT_1280X768P60_RB,
    63		V4L2_DV_BT_DMT_1280X768P60,
    64		V4L2_DV_BT_DMT_1280X768P75,
    65		V4L2_DV_BT_DMT_1280X768P85,
    66		V4L2_DV_BT_DMT_1280X768P120_RB,
    67		V4L2_DV_BT_DMT_1280X800P60_RB,
    68		V4L2_DV_BT_DMT_1280X800P60,
    69		V4L2_DV_BT_DMT_1280X800P75,
    70		V4L2_DV_BT_DMT_1280X800P85,
    71		V4L2_DV_BT_DMT_1280X800P120_RB,
    72		V4L2_DV_BT_DMT_1280X960P60,
    73		V4L2_DV_BT_DMT_1280X960P85,
    74		V4L2_DV_BT_DMT_1280X960P120_RB,
    75		V4L2_DV_BT_DMT_1280X1024P60,
    76		V4L2_DV_BT_DMT_1280X1024P75,
    77		V4L2_DV_BT_DMT_1280X1024P85,
    78		V4L2_DV_BT_DMT_1280X1024P120_RB,
    79		V4L2_DV_BT_DMT_1360X768P60,
    80		V4L2_DV_BT_DMT_1360X768P120_RB,
    81		V4L2_DV_BT_DMT_1366X768P60,
    82		V4L2_DV_BT_DMT_1366X768P60_RB,
    83		V4L2_DV_BT_DMT_1400X1050P60_RB,
    84		V4L2_DV_BT_DMT_1400X1050P60,
    85		V4L2_DV_BT_DMT_1400X1050P75,
    86		V4L2_DV_BT_DMT_1400X1050P85,
    87		V4L2_DV_BT_DMT_1400X1050P120_RB,
    88		V4L2_DV_BT_DMT_1440X900P60_RB,
    89		V4L2_DV_BT_DMT_1440X900P60,
    90		V4L2_DV_BT_DMT_1440X900P75,
    91		V4L2_DV_BT_DMT_1440X900P85,
    92		V4L2_DV_BT_DMT_1440X900P120_RB,
    93		V4L2_DV_BT_DMT_1600X900P60_RB,
    94		V4L2_DV_BT_DMT_1600X1200P60,
    95		V4L2_DV_BT_DMT_1600X1200P65,
    96		V4L2_DV_BT_DMT_1600X1200P70,
    97		V4L2_DV_BT_DMT_1600X1200P75,
    98		V4L2_DV_BT_DMT_1600X1200P85,
    99		V4L2_DV_BT_DMT_1600X1200P120_RB,
   100		V4L2_DV_BT_DMT_1680X1050P60_RB,
   101		V4L2_DV_BT_DMT_1680X1050P60,
   102		V4L2_DV_BT_DMT_1680X1050P75,
   103		V4L2_DV_BT_DMT_1680X1050P85,
   104		V4L2_DV_BT_DMT_1680X1050P120_RB,
   105		V4L2_DV_BT_DMT_1792X1344P60,
   106		V4L2_DV_BT_DMT_1792X1344P75,
   107		V4L2_DV_BT_DMT_1792X1344P120_RB,
   108		V4L2_DV_BT_DMT_1856X1392P60,
   109		V4L2_DV_BT_DMT_1856X1392P75,
   110		V4L2_DV_BT_DMT_1856X1392P120_RB,
   111		V4L2_DV_BT_DMT_1920X1200P60_RB,
   112		V4L2_DV_BT_DMT_1920X1200P60,
   113		V4L2_DV_BT_DMT_1920X1200P75,
   114		V4L2_DV_BT_DMT_1920X1200P85,
   115		V4L2_DV_BT_DMT_1920X1200P120_RB,
   116		V4L2_DV_BT_DMT_1920X1440P60,
   117		V4L2_DV_BT_DMT_1920X1440P75,
   118		V4L2_DV_BT_DMT_1920X1440P120_RB,
   119		V4L2_DV_BT_DMT_2048X1152P60_RB,
   120		V4L2_DV_BT_DMT_2560X1600P60_RB,
   121		V4L2_DV_BT_DMT_2560X1600P60,
   122		V4L2_DV_BT_DMT_2560X1600P75,
   123		V4L2_DV_BT_DMT_2560X1600P85,
   124		V4L2_DV_BT_DMT_2560X1600P120_RB,
   125		V4L2_DV_BT_CEA_3840X2160P24,
   126		V4L2_DV_BT_CEA_3840X2160P25,
   127		V4L2_DV_BT_CEA_3840X2160P30,
   128		V4L2_DV_BT_CEA_3840X2160P50,
   129		V4L2_DV_BT_CEA_3840X2160P60,
   130		V4L2_DV_BT_CEA_4096X2160P24,
   131		V4L2_DV_BT_CEA_4096X2160P25,
   132		V4L2_DV_BT_CEA_4096X2160P30,
   133		V4L2_DV_BT_CEA_4096X2160P50,
   134		V4L2_DV_BT_DMT_4096X2160P59_94_RB,
   135		V4L2_DV_BT_CEA_4096X2160P60,
   136		V4L2_DV_BT_CEA_720X480P60_PA16_9,
   137		V4L2_DV_BT_CEA_720X480I60_PA16_9,
   138		V4L2_DV_BT_CEA_720X240P60_VTOT262_PA4_3,
   139		V4L2_DV_BT_CEA_720X240P60_VTOT263_PA4_3,
   140		V4L2_DV_BT_CEA_720X240P60_VTOT262_PA16_9,
   141		V4L2_DV_BT_CEA_720X240P60_VTOT263_PA16_9,
   142		V4L2_DV_BT_CEA_2880X480I60_PA4_3,
   143		V4L2_DV_BT_CEA_2880X480I60_PA16_9,
   144		V4L2_DV_BT_CEA_2880X240P60_VTOT262_PA4_3,
   145		V4L2_DV_BT_CEA_2880X240P60_VTOT263_PA4_3,
   146		V4L2_DV_BT_CEA_2880X240P60_VTOT262_PA16_9,
   147		V4L2_DV_BT_CEA_2880X240P60_VTOT263_PA16_9,
   148		V4L2_DV_BT_CEA_1440X480P60_PA4_3,
   149		V4L2_DV_BT_CEA_1440X480P60_PA16_9,
   150		V4L2_DV_BT_CEA_720X576P50_PA16_9,
   151		V4L2_DV_BT_CEA_1920X1080I50_PA16_9,
   152		V4L2_DV_BT_CEA_720X576I50_PA16_9,
   153		V4L2_DV_BT_CEA_720X288P50_VTOT312_PA4_3,
   154		V4L2_DV_BT_CEA_720X288P50_VTOT313_PA4_3,
   155		V4L2_DV_BT_CEA_720X288P50_VTOT314_PA4_3,
   156		V4L2_DV_BT_CEA_720X288P50_VTOT312_PA16_9,
   157		V4L2_DV_BT_CEA_720X288P50_VTOT313_PA16_9,
   158		V4L2_DV_BT_CEA_720X288P50_VTOT314_PA16_9,
   159		V4L2_DV_BT_CEA_2880X576I50_PA4_3,
   160		V4L2_DV_BT_CEA_2880X576I50_PA16_9,
   161		V4L2_DV_BT_CEA_2880X288P50_VTOT312_PA4_3,
   162		V4L2_DV_BT_CEA_2880X288P50_VTOT313_PA4_3,
   163		V4L2_DV_BT_CEA_2880X288P50_VTOT314_PA4_3,
   164		V4L2_DV_BT_CEA_2880X288P50_VTOT312_PA16_9,
   165		V4L2_DV_BT_CEA_2880X288P50_VTOT313_PA16_9,
   166		V4L2_DV_BT_CEA_2880X288P50_VTOT314_PA16_9,
   167		V4L2_DV_BT_CEA_1440X576P50_PA4_3,
   168		V4L2_DV_BT_CEA_1440X576P50_PA16_9,
   169		V4L2_DV_BT_CEA_2880X480P60_PA4_3,
   170		V4L2_DV_BT_CEA_2880X480P60_PA16_9,
   171		V4L2_DV_BT_CEA_2880X576P50_PA4_3,
   172		V4L2_DV_BT_CEA_2880X576P50_PA16_9,
   173		V4L2_DV_BT_CEA_1920X1080I50_PA16_9,
   174		V4L2_DV_BT_CEA_1920X1080I100_PA16_9,
   175		V4L2_DV_BT_CEA_1280X720P100_PA16_9,
   176		V4L2_DV_BT_CEA_720X576P100_PA4_3,
   177		V4L2_DV_BT_CEA_720X576P100_PA16_9,
   178		V4L2_DV_BT_CEA_1440X576I100_PA4_3,
   179		V4L2_DV_BT_CEA_1440X576I100_PA16_9,
   180		V4L2_DV_BT_CEA_1920X1080I120_PA16_9,
   181		V4L2_DV_BT_CEA_1280X720P120_PA16_9,
   182		V4L2_DV_BT_CEA_720X480P120_PA4_3,
   183		V4L2_DV_BT_CEA_720X480P120_PA16_9,
   184		V4L2_DV_BT_CEA_1440X480I120_PA4_3,
   185		V4L2_DV_BT_CEA_1440X480I120_PA16_9,
   186		V4L2_DV_BT_CEA_720X576P200_PA4_3,
   187		V4L2_DV_BT_CEA_720X576P200_PA16_9,
   188		V4L2_DV_BT_CEA_1440X576I200_PA4_3,
   189		V4L2_DV_BT_CEA_1440X576I200_PA16_9,
   190		V4L2_DV_BT_CEA_720X480P240_PA4_3,
   191		V4L2_DV_BT_CEA_720X480P240_PA16_9,
   192		V4L2_DV_BT_CEA_1440X480I240_PA4_3,
   193		V4L2_DV_BT_CEA_1440X480I240_PA16_9,
   194		V4L2_DV_BT_CEA_1920X1080P120_PA16_9,
   195		V4L2_DV_BT_CEA_1920X1080P100_PA16_9,
   196		V4L2_DV_BT_CEA_1280X720P24_PA64_27,
   197		V4L2_DV_BT_CEA_1280X720P25_PA64_27,
   198		V4L2_DV_BT_CEA_1280X720P30_PA64_27,
   199		V4L2_DV_BT_CEA_1280X720P50_PA64_27,
   200		V4L2_DV_BT_CEA_1280X720P60_PA64_27,
   201		V4L2_DV_BT_CEA_1280X720P100_PA64_27,
   202		V4L2_DV_BT_CEA_1280X720P120_PA64_27,
   203		V4L2_DV_BT_CEA_1920X1080P24_PA64_27,
   204		V4L2_DV_BT_CEA_1920X1080P25_PA64_27,
   205		V4L2_DV_BT_CEA_1920X1080P30_PA64_27,
   206		V4L2_DV_BT_CEA_1920X1080P50_PA64_27,
   207		V4L2_DV_BT_CEA_1920X1080P60_PA64_27,
   208		V4L2_DV_BT_CEA_1920X1080P100_PA64_27,
   209		V4L2_DV_BT_CEA_1920X1080P120_PA64_27,
   210		V4L2_DV_BT_CEA_1680X720P24_PA64_27,
   211		V4L2_DV_BT_CEA_1680X720P25_PA64_27,
   212		V4L2_DV_BT_CEA_1680X720P30_PA64_27,
   213		V4L2_DV_BT_CEA_1680X720P50_PA64_27,
   214		V4L2_DV_BT_CEA_1680X720P60_PA64_27,
   215		V4L2_DV_BT_CEA_1680X720P100_PA64_27,
   216		V4L2_DV_BT_CEA_1680X720P120_PA64_27,
   217		V4L2_DV_BT_CEA_2560X1080P24_PA64_27,
   218		V4L2_DV_BT_CEA_2560X1080P25_PA64_27,
   219		V4L2_DV_BT_CEA_2560X1080P30_PA64_27,
   220		V4L2_DV_BT_CEA_2560X1080P50_PA64_27,
   221		V4L2_DV_BT_CEA_2560X1080P60_PA64_27,
   222		V4L2_DV_BT_CEA_2560X1080P100_PA64_27,
   223		V4L2_DV_BT_CEA_2560X1080P120_PA64_27,
   224		V4L2_DV_BT_CEA_3840X2160P24_PA64_27,
   225		V4L2_DV_BT_CEA_3840X2160P25_PA64_27,
   226		V4L2_DV_BT_CEA_3840X2160P30_PA64_27,
   227		V4L2_DV_BT_CEA_3840X2160P50_PA64_27,
   228		V4L2_DV_BT_CEA_3840X2160P60_PA64_27,
   229		V4L2_DV_BT_CEA_1280X720P48_PA16_9,
   230		V4L2_DV_BT_CEA_1280X720P48_PA64_27,
   231		V4L2_DV_BT_CEA_1680X720P48_PA64_27,
   232		V4L2_DV_BT_CEA_1920X1080P48_PA16_9,
   233		V4L2_DV_BT_CEA_1920X1080P48_PA64_27,
   234		V4L2_DV_BT_CEA_3840X2160P48_PA16_9,
   235		V4L2_DV_BT_CEA_4096X2160P48_PA256_135,
   236		V4L2_DV_BT_CEA_3840X2160P48_PA64_27,
   237		V4L2_DV_BT_CEA_3840X2160P100_PA16_9,
   238		V4L2_DV_BT_CEA_3840X2160P120_PA16_9,
   239		V4L2_DV_BT_CEA_3840X2160P100_PA64_27,
   240		V4L2_DV_BT_CEA_3840X2160P120_PA64_27,
   241		V4L2_DV_BT_CEA_5120X2160P24_PA64_27,
   242		V4L2_DV_BT_CEA_5120X2160P25_PA64_27,
   243		V4L2_DV_BT_CEA_5120X2160P30_PA64_27,
   244		V4L2_DV_BT_CEA_5120X2160P48_PA64_27,
   245		V4L2_DV_BT_CEA_5120X2160P50_PA64_27,
   246		V4L2_DV_BT_CEA_5120X2160P60_PA64_27,
   247		V4L2_DV_BT_CEA_5120X2160P100_PA64_27,
   248		V4L2_DV_BT_CEA_5120X2160P120_PA64_27,
   249		V4L2_DV_BT_CEA_7680X4320P24_PA16_9,
   250		V4L2_DV_BT_CEA_7680X4320P25_PA16_9,
   251		V4L2_DV_BT_CEA_7680X4320P30_PA16_9,
 > 252		V4L2_DV_BT_CEA_7680X4320P48_PA16_9,
   253		V4L2_DV_BT_CEA_7680X4320P50_PA16_9,
   254		V4L2_DV_BT_CEA_7680X4320P60_PA16_9,
   255		V4L2_DV_BT_CEA_7680X4320P100_PA16_9,
   256		V4L2_DV_BT_CEA_7680X4320P120_PA16_9,
   257		V4L2_DV_BT_CEA_7680X4320P24_PA64_27,
   258		V4L2_DV_BT_CEA_7680X4320P25_PA64_27,
   259		V4L2_DV_BT_CEA_7680X4320P30_PA64_27,
   260		V4L2_DV_BT_CEA_7680X4320P48_PA64_27,
   261		V4L2_DV_BT_CEA_7680X4320P50_PA64_27,
   262		V4L2_DV_BT_CEA_7680X4320P60_PA64_27,
   263		V4L2_DV_BT_CEA_7680X4320P100_PA64_27,
   264		V4L2_DV_BT_CEA_7680X4320P120_PA64_27,
   265		V4L2_DV_BT_CEA_10240X4320P24_PA64_27,
   266		V4L2_DV_BT_CEA_10240X4320P25_PA64_27,
   267		V4L2_DV_BT_CEA_10240X4320P30_PA64_27,
   268		V4L2_DV_BT_CEA_10240X4320P48_PA64_27,
   269		V4L2_DV_BT_CEA_10240X4320P50_PA64_27,
   270		V4L2_DV_BT_CEA_10240X4320P60_PA64_27,
   271		V4L2_DV_BT_CEA_10240X4320P100_PA64_27,
   272		V4L2_DV_BT_CEA_10240X4320P120_PA64_27,
   273		V4L2_DV_BT_CEA_4096X2160P100_PA256_135,
   274		V4L2_DV_BT_CEA_4096X2160P120_PA256_135,
   275		{ }
   276	};
   277	EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
   278	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

[-- Attachment #2: config.gz --]
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  parent reply	other threads:[~2021-04-28 23:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-28 15:25 [RFC 0/8] Add Synopsys DesignWare HDMI RX Controller and PHY drivers Nelson Costa
2021-04-28 15:25 ` [RFC 1/8] dt-bindings: media: Document Synopsys DesignWare HDMI RX Nelson Costa
2021-04-28 22:01   ` Laurent Pinchart
2021-04-29 18:03     ` Nelson Costa
2021-04-28 15:25 ` [RFC 2/8] MAINTAINERS: Add entry for Synopsys DesignWare HDMI drivers Nelson Costa
2021-04-28 15:25 ` [RFC 3/8] phy: Add PHY standard HDMI opts to the PHY API Nelson Costa
2021-04-28 15:25 ` [RFC 4/8] phy: dwc: Add Synopsys DesignWare HDMI RX PHYs e405 and e406 Driver Nelson Costa
2021-04-28 18:46   ` kernel test robot
2021-04-28 15:25 ` [RFC 5/8] media: platform: Add Synopsys DesignWare HDMI RX Controller Driver Nelson Costa
2021-04-28 15:25 ` [RFC 6/8] media: v4l2-dv-timings: Add more CEA/CTA-861 video format timings Nelson Costa
2021-04-28 21:00   ` kernel test robot
2021-04-28 23:13   ` kernel test robot [this message]
2021-04-28 15:25 ` [RFC 7/8] media: dwc: dw-hdmi-rx: Add support for Aspect Ratio Nelson Costa
2021-04-28 15:25 ` [RFC 8/8] media: dwc: dw-hdmi-rx: Add support for CEC Nelson Costa
  -- strict thread matches above, loose matches on Subject: below --
2021-04-28 20:35 [RFC 6/8] media: v4l2-dv-timings: Add more CEA/CTA-861 video format timings kernel test robot

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