From: "Sripada, Radhakrishna" <radhakrishna.sripada@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/5] drm/i915/display: Replace intel_psr_enabled() calls by intel_crtc_state check
Date: Mon, 10 May 2021 16:47:56 -0700 [thread overview]
Message-ID: <20210510234756.GB31357@InViCtUs> (raw)
In-Reply-To: <20210418002126.87882-2-jose.souza@intel.com>
On Sat, Apr 17, 2021 at 05:21:23PM -0700, José Roberto de Souza wrote:
> All of this places don't need to intel_psr_enabled() that will lock
> psr mutex, check state and unlock.
>
> Instead it can directly check PSR state in intel_crtc_state, the only
> place that was not possible was intel_read_dp_vsc_sdp() but since
> "drm/i915/display: Fill PSR state during hardware configuration read
> out" it is possible.
>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5ee953aaa00c..72bcc10cae4f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2861,7 +2861,6 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
> const struct drm_connector_state *conn_state)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> - struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);
> u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
> VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |
> @@ -2870,7 +2869,7 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
>
> /* TODO: Add DSC case (DIP_ENABLE_PPS) */
> /* When PSR is enabled, this routine doesn't disable VSC DIP */
> - if (intel_psr_enabled(intel_dp))
> + if (crtc_state->has_psr)
> val &= ~dip_enable;
> else
> val &= ~(dip_enable | VIDEO_DIP_ENABLE_VSC_HSW);
> @@ -2885,7 +2884,7 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
> intel_de_posting_read(dev_priv, reg);
>
> /* When PSR is enabled, VSC SDP is handled by PSR routine */
> - if (!intel_psr_enabled(intel_dp))
> + if (!crtc_state->has_psr)
> intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);
>
> intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA);
> @@ -3012,14 +3011,13 @@ static void intel_read_dp_vsc_sdp(struct intel_encoder *encoder,
> struct drm_dp_vsc_sdp *vsc)
> {
> struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> - struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> unsigned int type = DP_SDP_VSC;
> struct dp_sdp sdp = {};
> int ret;
>
> /* When PSR is enabled, VSC SDP is handled by PSR routine */
> - if (intel_psr_enabled(intel_dp))
> + if (crtc_state->has_psr)
> return;
>
> if ((crtc_state->infoframes.enable &
> --
> 2.31.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-10 23:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-18 0:21 [Intel-gfx] [PATCH 1/5] drm/i915/display: Fill PSR state during hardware configuration read out José Roberto de Souza
2021-04-18 0:21 ` [Intel-gfx] [PATCH 2/5] drm/i915/display: Replace intel_psr_enabled() calls by intel_crtc_state check José Roberto de Souza
2021-05-10 23:47 ` Sripada, Radhakrishna [this message]
2021-04-18 0:21 ` [Intel-gfx] [PATCH 3/5] drm/i915/display: Drop duplicated code in intel_dp_set_infoframes() José Roberto de Souza
2021-05-10 23:49 ` Sripada, Radhakrishna
2021-04-18 0:21 ` [Intel-gfx] [PATCH 4/5] drm/i915/display: Drop dead code from hsw_read_infoframe() José Roberto de Souza
2021-05-10 23:50 ` Sripada, Radhakrishna
2021-04-18 0:21 ` [Intel-gfx] [PATCH 5/5] drm/i915/display/xelpd: Implement Wa_14013475917 José Roberto de Souza
2021-05-11 0:05 ` Sripada, Radhakrishna
2021-04-18 0:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/5] drm/i915/display: Fill PSR state during hardware configuration read out Patchwork
2021-04-18 1:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-04-18 3:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-05-11 19:32 ` Souza, Jose
2021-05-10 23:45 ` [Intel-gfx] [PATCH 1/5] " Sripada, Radhakrishna
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210510234756.GB31357@InViCtUs \
--to=radhakrishna.sripada@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jose.souza@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.