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From: "Sripada, Radhakrishna" <radhakrishna.sripada@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/5] drm/i915/display: Drop duplicated code in intel_dp_set_infoframes()
Date: Mon, 10 May 2021 16:49:21 -0700	[thread overview]
Message-ID: <20210510234921.GC31357@InViCtUs> (raw)
In-Reply-To: <20210418002126.87882-3-jose.souza@intel.com>

On Sat, Apr 17, 2021 at 05:21:24PM -0700, José Roberto de Souza wrote:
> No functional changes in here.
> 
> Cc: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++-----------
>  1 file changed, 6 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 72bcc10cae4f..cf380f98d54c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2865,24 +2865,19 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
>  	u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
>  			 VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |
>  			 VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;
> -	u32 val = intel_de_read(dev_priv, reg);
> +	u32 val = intel_de_read(dev_priv, reg) & ~dip_enable;
>  
>  	/* TODO: Add DSC case (DIP_ENABLE_PPS) */
>  	/* When PSR is enabled, this routine doesn't disable VSC DIP */
> -	if (crtc_state->has_psr)
> -		val &= ~dip_enable;
> -	else
> -		val &= ~(dip_enable | VIDEO_DIP_ENABLE_VSC_HSW);
> -
> -	if (!enable) {
> -		intel_de_write(dev_priv, reg, val);
> -		intel_de_posting_read(dev_priv, reg);
> -		return;
> -	}
> +	if (!crtc_state->has_psr)
> +		val &= ~VIDEO_DIP_ENABLE_VSC_HSW;
>  
>  	intel_de_write(dev_priv, reg, val);
>  	intel_de_posting_read(dev_priv, reg);
>  
> +	if (!enable)
> +		return;
> +
>  	/* When PSR is enabled, VSC SDP is handled by PSR routine */
>  	if (!crtc_state->has_psr)
>  		intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);
> -- 
> 2.31.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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  reply	other threads:[~2021-05-10 23:49 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-18  0:21 [Intel-gfx] [PATCH 1/5] drm/i915/display: Fill PSR state during hardware configuration read out José Roberto de Souza
2021-04-18  0:21 ` [Intel-gfx] [PATCH 2/5] drm/i915/display: Replace intel_psr_enabled() calls by intel_crtc_state check José Roberto de Souza
2021-05-10 23:47   ` Sripada, Radhakrishna
2021-04-18  0:21 ` [Intel-gfx] [PATCH 3/5] drm/i915/display: Drop duplicated code in intel_dp_set_infoframes() José Roberto de Souza
2021-05-10 23:49   ` Sripada, Radhakrishna [this message]
2021-04-18  0:21 ` [Intel-gfx] [PATCH 4/5] drm/i915/display: Drop dead code from hsw_read_infoframe() José Roberto de Souza
2021-05-10 23:50   ` Sripada, Radhakrishna
2021-04-18  0:21 ` [Intel-gfx] [PATCH 5/5] drm/i915/display/xelpd: Implement Wa_14013475917 José Roberto de Souza
2021-05-11  0:05   ` Sripada, Radhakrishna
2021-04-18  0:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/5] drm/i915/display: Fill PSR state during hardware configuration read out Patchwork
2021-04-18  1:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-04-18  3:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-05-11 19:32   ` Souza, Jose
2021-05-10 23:45 ` [Intel-gfx] [PATCH 1/5] " Sripada, Radhakrishna

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