From: Keith Busch <kbusch@kernel.org>
To: "Deucher, Alexander" <Alexander.Deucher@amd.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
"Liang, Prike" <Prike.Liang@amd.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"axboe@fb.com" <axboe@fb.com>, "hch@lst.de" <hch@lst.de>,
"sagi@grimberg.me" <sagi@grimberg.me>,
"linux-nvme@lists.infradead.org" <linux-nvme@lists.infradead.org>,
"stable@vger.kernel.org" <stable@vger.kernel.org>,
"S-k, Shyam-sundar" <Shyam-sundar.S-k@amd.com>,
Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
Subject: Re: [PATCH v5 1/2] PCI: add AMD PCIe quirk for nvme shutdown opt
Date: Thu, 20 May 2021 12:03:43 -0600 [thread overview]
Message-ID: <20210520180343.GA3783@C02WT3WMHTD6> (raw)
In-Reply-To: <MN2PR12MB4488F16CE50BFD4E1F453CFAF72A9@MN2PR12MB4488.namprd12.prod.outlook.com>
On Thu, May 20, 2021 at 05:40:54PM +0000, Deucher, Alexander wrote:
> It doesn't really have anything to do with PCI. The PCI link is just a proxy
> for specific AMD platforms. It's platform firmware behavior we are catering
> to. This was originally posted as an nvme quirk, but during the review it
> was recommended to move the quirk into PCI because the quirk is not specific
> a particular NVMe device, but rather a set of AMD platforms. Lots of other
> platforms seems to do similar things in the nvme driver based on ACPI or DMI
> flags, etc. On our hardware this nvme flag is required for all cezanne and
> renoir platforms.
The quirk was initially presented as specific to the pci root. Does it make
more sense for nvme to recognize the limitation from querying a different
platform component instead of the pci bus?
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WARNING: multiple messages have this Message-ID (diff)
From: Keith Busch <kbusch@kernel.org>
To: "Deucher, Alexander" <Alexander.Deucher@amd.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
"Liang, Prike" <Prike.Liang@amd.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"axboe@fb.com" <axboe@fb.com>, "hch@lst.de" <hch@lst.de>,
"sagi@grimberg.me" <sagi@grimberg.me>,
"linux-nvme@lists.infradead.org" <linux-nvme@lists.infradead.org>,
"stable@vger.kernel.org" <stable@vger.kernel.org>,
"S-k, Shyam-sundar" <Shyam-sundar.S-k@amd.com>,
Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>
Subject: Re: [PATCH v5 1/2] PCI: add AMD PCIe quirk for nvme shutdown opt
Date: Thu, 20 May 2021 12:03:43 -0600 [thread overview]
Message-ID: <20210520180343.GA3783@C02WT3WMHTD6> (raw)
In-Reply-To: <MN2PR12MB4488F16CE50BFD4E1F453CFAF72A9@MN2PR12MB4488.namprd12.prod.outlook.com>
On Thu, May 20, 2021 at 05:40:54PM +0000, Deucher, Alexander wrote:
> It doesn't really have anything to do with PCI. The PCI link is just a proxy
> for specific AMD platforms. It's platform firmware behavior we are catering
> to. This was originally posted as an nvme quirk, but during the review it
> was recommended to move the quirk into PCI because the quirk is not specific
> a particular NVMe device, but rather a set of AMD platforms. Lots of other
> platforms seems to do similar things in the nvme driver based on ACPI or DMI
> flags, etc. On our hardware this nvme flag is required for all cezanne and
> renoir platforms.
The quirk was initially presented as specific to the pci root. Does it make
more sense for nvme to recognize the limitation from querying a different
platform component instead of the pci bus?
next prev parent reply other threads:[~2021-05-20 18:04 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-18 2:24 [PATCH v5 0/2] nvme-pci: add AMD PCIe quirk for NVMe simple suspend/resume Prike Liang
2021-05-18 2:24 ` Prike Liang
2021-05-18 2:24 ` [PATCH v5 1/2] PCI: add AMD PCIe quirk for nvme shutdown opt Prike Liang
2021-05-18 2:24 ` Prike Liang
2021-05-19 21:33 ` Bjorn Helgaas
2021-05-19 21:33 ` Bjorn Helgaas
2021-05-20 6:57 ` Liang, Prike
2021-05-20 6:57 ` Liang, Prike
2021-05-20 16:58 ` Bjorn Helgaas
2021-05-20 16:58 ` Bjorn Helgaas
2021-05-20 17:40 ` Deucher, Alexander
2021-05-20 17:40 ` Deucher, Alexander
2021-05-20 18:03 ` Keith Busch [this message]
2021-05-20 18:03 ` Keith Busch
2021-05-20 18:30 ` Deucher, Alexander
2021-05-20 18:30 ` Deucher, Alexander
2021-05-20 20:34 ` Limonciello, Mario
2021-05-20 20:34 ` Limonciello, Mario
2021-05-21 5:47 ` Liang, Prike
2021-05-21 5:47 ` Liang, Prike
2021-05-20 19:00 ` Bjorn Helgaas
2021-05-20 19:00 ` Bjorn Helgaas
2021-05-18 2:24 ` [PATCH v5 2/2] nvme-pci: add AMD PCIe quirk for simple suspend/resume Prike Liang
2021-05-18 2:24 ` Prike Liang
2021-05-18 7:14 ` [PATCH v5 0/2] nvme-pci: add AMD PCIe quirk for NVMe " Christoph Hellwig
2021-05-18 7:14 ` Christoph Hellwig
-- strict thread matches above, loose matches on Subject: below --
2021-04-22 1:19 Prike Liang
2021-04-22 1:19 ` [PATCH v5 1/2] PCI: add AMD PCIe quirk for nvme shutdown opt Prike Liang
2021-04-22 1:19 ` Prike Liang
2021-05-06 3:08 ` Liang, Prike
2021-05-06 3:08 ` Liang, Prike
2021-05-10 1:18 ` Liang, Prike
2021-05-10 1:18 ` Liang, Prike
2021-04-16 6:54 [PATCH v5 0/2] nvme-pci: add AMD PCIe quirk for NVMe simple suspend/resume Prike Liang
2021-04-16 6:54 ` [PATCH v5 1/2] PCI: add AMD PCIe quirk for nvme shutdown opt Prike Liang
2021-04-16 6:54 ` Prike Liang
2021-04-16 15:56 ` Keith Busch
2021-04-16 15:56 ` Keith Busch
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