From: Punit Agrawal <punitagrawal@gmail.com>
To: linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org
Cc: Punit Agrawal <punitagrawal@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, alexandru.elisei@arm.com,
wqu@suse.com, robin.murphy@arm.com, pgwipeout@gmail.com,
ardb@kernel.org, briannorris@chromium.org,
shawn.lin@rock-chips.com, helgaas@kernel.org, robh+dt@kernel.org,
Vidya Sagar <vidyas@nvidia.com>
Subject: [PATCH v2 3/4] PCI: of: Refactor the check for non-prefetchable 32-bit window
Date: Tue, 1 Jun 2021 07:10:56 +0900 [thread overview]
Message-ID: <20210531221057.3406958-4-punitagrawal@gmail.com> (raw)
In-Reply-To: <20210531221057.3406958-1-punitagrawal@gmail.com>
Recently, an override was added for non-prefetchable host bridge
windows below 4GB that have the 64-bit address attribute set. As many
of the conditions for the check overlap with the check for
non-prefetchable window size, refactor the code to unify the ranges
validation into devm_of_pci_get_host_bridge_resources().
As an added benefit, the warning message is now printed right after
the range mapping giving the user a better indication of where the
issue is.
Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
---
drivers/pci/of.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index c2a57c61f1d1..836d2787510f 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -348,11 +348,15 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev,
*io_base = range.cpu_addr;
} else if (resource_type(res) == IORESOURCE_MEM) {
if (!(res->flags & IORESOURCE_PREFETCH)) {
- if (res->flags & IORESOURCE_MEM_64)
+ if (res->flags & IORESOURCE_MEM_64) {
if (!upper_32_bits(range.pci_addr + range.size - 1)) {
dev_warn(dev, "Clearing 64-bit flag for non-prefetchable memory below 4GB\n");
res->flags &= ~IORESOURCE_MEM_64;
}
+ } else {
+ if (upper_32_bits(resource_size(res)))
+ dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
+ }
}
}
@@ -572,12 +576,6 @@ static int pci_parse_request_of_pci_ranges(struct device *dev,
break;
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
-
- if (!(res->flags & IORESOURCE_PREFETCH))
- if (!(res->flags & IORESOURCE_MEM_64) &&
- upper_32_bits(resource_size(res)))
- dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
-
break;
}
}
--
2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Punit Agrawal <punitagrawal@gmail.com>
To: linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org
Cc: Punit Agrawal <punitagrawal@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, alexandru.elisei@arm.com,
wqu@suse.com, robin.murphy@arm.com, pgwipeout@gmail.com,
ardb@kernel.org, briannorris@chromium.org,
shawn.lin@rock-chips.com, helgaas@kernel.org, robh+dt@kernel.org,
Vidya Sagar <vidyas@nvidia.com>
Subject: [PATCH v2 3/4] PCI: of: Refactor the check for non-prefetchable 32-bit window
Date: Tue, 1 Jun 2021 07:10:56 +0900 [thread overview]
Message-ID: <20210531221057.3406958-4-punitagrawal@gmail.com> (raw)
In-Reply-To: <20210531221057.3406958-1-punitagrawal@gmail.com>
Recently, an override was added for non-prefetchable host bridge
windows below 4GB that have the 64-bit address attribute set. As many
of the conditions for the check overlap with the check for
non-prefetchable window size, refactor the code to unify the ranges
validation into devm_of_pci_get_host_bridge_resources().
As an added benefit, the warning message is now printed right after
the range mapping giving the user a better indication of where the
issue is.
Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
---
drivers/pci/of.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index c2a57c61f1d1..836d2787510f 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -348,11 +348,15 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev,
*io_base = range.cpu_addr;
} else if (resource_type(res) == IORESOURCE_MEM) {
if (!(res->flags & IORESOURCE_PREFETCH)) {
- if (res->flags & IORESOURCE_MEM_64)
+ if (res->flags & IORESOURCE_MEM_64) {
if (!upper_32_bits(range.pci_addr + range.size - 1)) {
dev_warn(dev, "Clearing 64-bit flag for non-prefetchable memory below 4GB\n");
res->flags &= ~IORESOURCE_MEM_64;
}
+ } else {
+ if (upper_32_bits(resource_size(res)))
+ dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
+ }
}
}
@@ -572,12 +576,6 @@ static int pci_parse_request_of_pci_ranges(struct device *dev,
break;
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
-
- if (!(res->flags & IORESOURCE_PREFETCH))
- if (!(res->flags & IORESOURCE_MEM_64) &&
- upper_32_bits(resource_size(res)))
- dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
-
break;
}
}
--
2.30.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Punit Agrawal <punitagrawal@gmail.com>
To: linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org
Cc: Punit Agrawal <punitagrawal@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, alexandru.elisei@arm.com,
wqu@suse.com, robin.murphy@arm.com, pgwipeout@gmail.com,
ardb@kernel.org, briannorris@chromium.org,
shawn.lin@rock-chips.com, helgaas@kernel.org, robh+dt@kernel.org,
Vidya Sagar <vidyas@nvidia.com>
Subject: [PATCH v2 3/4] PCI: of: Refactor the check for non-prefetchable 32-bit window
Date: Tue, 1 Jun 2021 07:10:56 +0900 [thread overview]
Message-ID: <20210531221057.3406958-4-punitagrawal@gmail.com> (raw)
In-Reply-To: <20210531221057.3406958-1-punitagrawal@gmail.com>
Recently, an override was added for non-prefetchable host bridge
windows below 4GB that have the 64-bit address attribute set. As many
of the conditions for the check overlap with the check for
non-prefetchable window size, refactor the code to unify the ranges
validation into devm_of_pci_get_host_bridge_resources().
As an added benefit, the warning message is now printed right after
the range mapping giving the user a better indication of where the
issue is.
Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
---
drivers/pci/of.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index c2a57c61f1d1..836d2787510f 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -348,11 +348,15 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev,
*io_base = range.cpu_addr;
} else if (resource_type(res) == IORESOURCE_MEM) {
if (!(res->flags & IORESOURCE_PREFETCH)) {
- if (res->flags & IORESOURCE_MEM_64)
+ if (res->flags & IORESOURCE_MEM_64) {
if (!upper_32_bits(range.pci_addr + range.size - 1)) {
dev_warn(dev, "Clearing 64-bit flag for non-prefetchable memory below 4GB\n");
res->flags &= ~IORESOURCE_MEM_64;
}
+ } else {
+ if (upper_32_bits(resource_size(res)))
+ dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
+ }
}
}
@@ -572,12 +576,6 @@ static int pci_parse_request_of_pci_ranges(struct device *dev,
break;
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
-
- if (!(res->flags & IORESOURCE_PREFETCH))
- if (!(res->flags & IORESOURCE_MEM_64) &&
- upper_32_bits(resource_size(res)))
- dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
-
break;
}
}
--
2.30.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-05-31 22:12 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-31 22:10 [PATCH v2 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-05-31 22:10 ` [PATCH v2 1/4] PCI: of: Override 64-bit flag for non-prefetchable memory below 4GB Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-06-01 5:49 ` Ard Biesheuvel
2021-06-01 5:49 ` Ard Biesheuvel
2021-06-01 5:49 ` Ard Biesheuvel
2021-06-02 13:38 ` Punit Agrawal
2021-06-02 13:38 ` Punit Agrawal
2021-06-02 13:38 ` Punit Agrawal
2021-05-31 22:10 ` [PATCH v2 2/4] PCI: of: Relax the condition for warning about non-prefetchable memory aperture size Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal [this message]
2021-05-31 22:10 ` [PATCH v2 3/4] PCI: of: Refactor the check for non-prefetchable 32-bit window Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-05-31 22:10 ` [PATCH v2 4/4] arm64: dts: rockchip: Update PCI host bridge window to 32-bit address memory Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-05-31 22:10 ` Punit Agrawal
2021-06-01 12:53 ` [PATCH v2 0/4] PCI: of: Improvements to handle 64-bit attribute for non-prefetchable ranges Alexandru Elisei
2021-06-01 12:53 ` Alexandru Elisei
2021-06-01 12:53 ` Alexandru Elisei
2021-06-02 13:39 ` Punit Agrawal
2021-06-02 13:39 ` Punit Agrawal
2021-06-02 13:39 ` Punit Agrawal
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