All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chris Morgan <macroalpha82@gmail.com>
To: linux-spi@vger.kernel.org
Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de,
	jbx6244@gmail.com, hjc@rock-chips.com,
	yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v4 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance
Date: Tue,  1 Jun 2021 15:10:21 -0500	[thread overview]
Message-ID: <20210601201021.4406-5-macroalpha82@gmail.com> (raw)
In-Reply-To: <20210601201021.4406-1-macroalpha82@gmail.com>

From: Chris Morgan <macromorgan@hotmail.com>

This enables the Rockchip Serial Flash Controller for the Odroid Go
Advance. Note that while the attached SPI NOR flash and the controller
both support quad read mode, only 2 of the required 4 pins are present.
The rx and tx bus width is set to 2 for this reason.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
 .../boot/dts/rockchip/rk3326-odroid-go2.dts      | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
index 49c97f76df77..46f1d2f356cc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
@@ -484,6 +484,22 @@ &sdmmc {
 	status = "okay";
 };
 
+&sfc {
+	pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
+	pinctrl-names = "default";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <108000000>;
+		reg = <0>;
+		spi-rx-bus-width = <2>;
+		spi-tx-bus-width = <2>;
+	};
+};
+
 &tsadc {
 	status = "okay";
 };
-- 
2.25.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Chris Morgan <macroalpha82@gmail.com>
To: linux-spi@vger.kernel.org
Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de,
	jbx6244@gmail.com, hjc@rock-chips.com,
	yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v4 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance
Date: Tue,  1 Jun 2021 15:10:21 -0500	[thread overview]
Message-ID: <20210601201021.4406-5-macroalpha82@gmail.com> (raw)
In-Reply-To: <20210601201021.4406-1-macroalpha82@gmail.com>

From: Chris Morgan <macromorgan@hotmail.com>

This enables the Rockchip Serial Flash Controller for the Odroid Go
Advance. Note that while the attached SPI NOR flash and the controller
both support quad read mode, only 2 of the required 4 pins are present.
The rx and tx bus width is set to 2 for this reason.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
 .../boot/dts/rockchip/rk3326-odroid-go2.dts      | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
index 49c97f76df77..46f1d2f356cc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
@@ -484,6 +484,22 @@ &sdmmc {
 	status = "okay";
 };
 
+&sfc {
+	pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
+	pinctrl-names = "default";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <108000000>;
+		reg = <0>;
+		spi-rx-bus-width = <2>;
+		spi-tx-bus-width = <2>;
+	};
+};
+
 &tsadc {
 	status = "okay";
 };
-- 
2.25.1


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Chris Morgan <macroalpha82@gmail.com>
To: linux-spi@vger.kernel.org
Cc: broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de,
	jbx6244@gmail.com, hjc@rock-chips.com,
	yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, p.yadav@ti.com,
	Chris Morgan <macromorgan@hotmail.com>
Subject: [PATCH v4 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance
Date: Tue,  1 Jun 2021 15:10:21 -0500	[thread overview]
Message-ID: <20210601201021.4406-5-macroalpha82@gmail.com> (raw)
In-Reply-To: <20210601201021.4406-1-macroalpha82@gmail.com>

From: Chris Morgan <macromorgan@hotmail.com>

This enables the Rockchip Serial Flash Controller for the Odroid Go
Advance. Note that while the attached SPI NOR flash and the controller
both support quad read mode, only 2 of the required 4 pins are present.
The rx and tx bus width is set to 2 for this reason.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
 .../boot/dts/rockchip/rk3326-odroid-go2.dts      | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
index 49c97f76df77..46f1d2f356cc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
@@ -484,6 +484,22 @@ &sdmmc {
 	status = "okay";
 };
 
+&sfc {
+	pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
+	pinctrl-names = "default";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <108000000>;
+		reg = <0>;
+		spi-rx-bus-width = <2>;
+		spi-tx-bus-width = <2>;
+	};
+};
+
 &tsadc {
 	status = "okay";
 };
-- 
2.25.1


  parent reply	other threads:[~2021-06-01 20:12 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-01 20:10 [PATCH v3 0/4] Add Rockchip SFC(serial flash controller) support Chris Morgan
2021-06-01 20:10 ` Chris Morgan
2021-06-01 20:10 ` Chris Morgan
2021-06-01 20:10 ` [PATCH v3 1/4] dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash controller Chris Morgan
2021-06-01 20:10   ` Chris Morgan
2021-06-01 20:10   ` Chris Morgan
2021-06-02  8:13   ` Johan Jonker
2021-06-02  8:13     ` Johan Jonker
2021-06-02  8:13     ` Johan Jonker
2021-06-02 14:49     ` Chris Morgan
2021-06-02 14:49       ` Chris Morgan
2021-06-01 20:10 ` [PATCH v3 2/4] spi: rockchip-sfc: add rockchip serial flash controller driver Chris Morgan
2021-06-01 20:10   ` Chris Morgan
2021-06-01 20:10   ` Chris Morgan
2021-06-02 16:03   ` Mark Brown
2021-06-02 16:03     ` Mark Brown
2021-06-02 16:03     ` Mark Brown
2021-06-01 20:10 ` [PATCH v3 3/4] arm64: dts: rockchip: Add SFC to PX30 Chris Morgan
2021-06-01 20:10   ` Chris Morgan
2021-06-01 20:10   ` Chris Morgan
2021-06-01 20:10 ` Chris Morgan [this message]
2021-06-01 20:10   ` [PATCH v4 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Chris Morgan
2021-06-01 20:10   ` Chris Morgan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210601201021.4406-5-macroalpha82@gmail.com \
    --to=macroalpha82@gmail.com \
    --cc=broonie@kernel.org \
    --cc=heiko@sntech.de \
    --cc=hjc@rock-chips.com \
    --cc=jbx6244@gmail.com \
    --cc=linux-mtd@lists.infradead.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=macromorgan@hotmail.com \
    --cc=p.yadav@ti.com \
    --cc=robh+dt@kernel.org \
    --cc=sugar.zhang@rock-chips.com \
    --cc=yifeng.zhao@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.