From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>
Cc: Jose.Abreu@synopsys.com, andrew@lunn.ch, hkallweit1@gmail.com,
kuba@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,
alexandre.torgue@foss.st.com, davem@davemloft.net,
mcoquelin.stm32@gmail.com, weifeng.voon@intel.com,
boon.leong.ong@intel.com, tee.min.tan@intel.com,
vee.khee.wong@linux.intel.com, vee.khee.wong@intel.com,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [RESEND PATCH net-next v4 0/3] Enable 2.5Gbps speed for stmmac
Date: Thu, 3 Jun 2021 14:08:51 +0100 [thread overview]
Message-ID: <20210603130851.GS30436@shell.armlinux.org.uk> (raw)
In-Reply-To: <20210603115032.2470-1-michael.wei.hong.sit@intel.com>
Hi,
On Thu, Jun 03, 2021 at 07:50:29PM +0800, Michael Sit Wei Hong wrote:
> Intel mGbE supports 2.5Gbps link speed by overclocking the clock rate
> by 2.5 times to support 2.5Gbps link speed. In this mode, the serdes/PHY
> operates at a serial baud rate of 3.125 Gbps and the PCS data path and
> GMII interface of the MAC operate at 312.5 MHz instead of 125 MHz.
> This is configured in the BIOS during boot up. The kernel driver is not able
> access to modify the clock rate for 1Gbps/2.5G mode on the fly. The way to
> determine the current 1G/2.5G mode is by reading a dedicated adhoc
> register through mdio bus.
How does this interact with Vladimir's "Convert xpcs to phylink_pcs_ops"
series? Is there an inter-dependency between these, or a preferred order
that they should be applied?
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
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WARNING: multiple messages have this Message-ID (diff)
From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Michael Sit Wei Hong <michael.wei.hong.sit@intel.com>
Cc: Jose.Abreu@synopsys.com, andrew@lunn.ch, hkallweit1@gmail.com,
kuba@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com,
alexandre.torgue@foss.st.com, davem@davemloft.net,
mcoquelin.stm32@gmail.com, weifeng.voon@intel.com,
boon.leong.ong@intel.com, tee.min.tan@intel.com,
vee.khee.wong@linux.intel.com, vee.khee.wong@intel.com,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [RESEND PATCH net-next v4 0/3] Enable 2.5Gbps speed for stmmac
Date: Thu, 3 Jun 2021 14:08:51 +0100 [thread overview]
Message-ID: <20210603130851.GS30436@shell.armlinux.org.uk> (raw)
In-Reply-To: <20210603115032.2470-1-michael.wei.hong.sit@intel.com>
Hi,
On Thu, Jun 03, 2021 at 07:50:29PM +0800, Michael Sit Wei Hong wrote:
> Intel mGbE supports 2.5Gbps link speed by overclocking the clock rate
> by 2.5 times to support 2.5Gbps link speed. In this mode, the serdes/PHY
> operates at a serial baud rate of 3.125 Gbps and the PCS data path and
> GMII interface of the MAC operate at 312.5 MHz instead of 125 MHz.
> This is configured in the BIOS during boot up. The kernel driver is not able
> access to modify the clock rate for 1Gbps/2.5G mode on the fly. The way to
> determine the current 1G/2.5G mode is by reading a dedicated adhoc
> register through mdio bus.
How does this interact with Vladimir's "Convert xpcs to phylink_pcs_ops"
series? Is there an inter-dependency between these, or a preferred order
that they should be applied?
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2021-06-03 13:11 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 11:50 [RESEND PATCH net-next v4 0/3] Enable 2.5Gbps speed for stmmac Michael Sit Wei Hong
2021-06-03 11:50 ` Michael Sit Wei Hong
2021-06-03 11:50 ` [RESEND PATCH net-next v4 1/3] net: stmmac: split xPCS setup from mdio register Michael Sit Wei Hong
2021-06-03 11:50 ` Michael Sit Wei Hong
2021-06-03 13:20 ` Vladimir Oltean
2021-06-03 13:20 ` Vladimir Oltean
2021-06-03 13:49 ` Sit, Michael Wei Hong
2021-06-03 13:49 ` Sit, Michael Wei Hong
2021-06-03 16:14 ` Vladimir Oltean
2021-06-03 16:14 ` Vladimir Oltean
2021-06-04 6:53 ` Voon, Weifeng
2021-06-04 6:53 ` Voon, Weifeng
2021-06-03 11:50 ` [RESEND PATCH net-next v4 2/3] net: pcs: add 2500BASEX support for Intel mGbE controller Michael Sit Wei Hong
2021-06-03 11:50 ` Michael Sit Wei Hong
2021-06-03 11:50 ` [RESEND PATCH net-next v4 3/3] net: stmmac: enable Intel mGbE 2.5Gbps link speed Michael Sit Wei Hong
2021-06-03 11:50 ` Michael Sit Wei Hong
2021-06-03 13:08 ` Russell King (Oracle) [this message]
2021-06-03 13:08 ` [RESEND PATCH net-next v4 0/3] Enable 2.5Gbps speed for stmmac Russell King (Oracle)
2021-06-03 13:28 ` Vladimir Oltean
2021-06-03 13:28 ` Vladimir Oltean
2021-06-03 13:43 ` Sit, Michael Wei Hong
2021-06-03 13:43 ` Sit, Michael Wei Hong
2021-06-03 13:47 ` Vladimir Oltean
2021-06-03 13:47 ` Vladimir Oltean
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