From: Steven Lee <steven_lee@aspeedtech.com>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v4 3/7] ARM: dts: aspeed-g6: Add SGPIO node.
Date: Tue, 8 Jun 2021 10:25:32 +0800 [thread overview]
Message-ID: <20210608022531.GA2948@aspeedtech.com> (raw)
In-Reply-To: <5277db96-4eb8-4794-a1fa-6a5bc40bffb7@www.fastmail.com>
The 06/08/2021 07:28, Andrew Jeffery wrote:
> On Mon, 7 Jun 2021, at 16:45, Steven Lee wrote:
> > AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
> > with 80 pins.
> >
> > Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> > ---
> > arch/arm/boot/dts/aspeed-g6.dtsi | 30 ++++++++++++++++++++++++++++++
> > 1 file changed, 30 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> > index f96607b7b4e2..c09b24824b6d 100644
> > --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> > +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> > @@ -377,6 +377,36 @@
> > #interrupt-cells = <2>;
> > };
> >
> > + sgpiom0: sgpiom at 1e780500 {
> > + #gpio-cells = <2>;
> > + gpio-controller;
> > + compatible = "aspeed,ast2600-sgpiom-128";
> > + reg = <0x1e780500 0x100>;
> > + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> > + ngpios = <128>;
>
> Doesn't this affect the way the data is presented on the bus?
>
I add ngpios in aspeed-g6.dtsi as it can be overridden by dts files and
driver won't return error if users only add status = "okay" in
dts files without adding ngpios property.
I will remove the property from aspeed-g6.dtsi if we don't need a
default value for ngpios.
> My understanding is this should be defined by each platform, not in the dtsi. Having said that, it appears it is specified in aspeed-g5.dtsi (as the value 8?).
>
I will remove the property from aspeed-g5 in a separate patch.
Thanks,
Steven
> > + clocks = <&syscon ASPEED_CLK_APB2>;
> > + interrupt-controller;
> > + bus-frequency = <12000000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_sgpm1_default>;
> > + status = "disabled";
> > + };
> > +
> > + sgpiom1: sgpiom at 1e780600 {
> > + #gpio-cells = <2>;
> > + gpio-controller;
> > + compatible = "aspeed,ast2600-sgpiom-80";
> > + reg = <0x1e780600 0x100>;
> > + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
> > + ngpios = <80>;
>
> As above.
>
> Andrew
WARNING: multiple messages have this Message-ID (diff)
From: Steven Lee <steven_lee@aspeedtech.com>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@lists.ozlabs.org>,
open list <linux-kernel@vger.kernel.org>,
Hongwei Zhang <Hongweiz@ami.com>,
Ryan Chen <ryan_chen@aspeedtech.com>,
Billy Tsai <billy_tsai@aspeedtech.com>
Subject: Re: [PATCH v4 3/7] ARM: dts: aspeed-g6: Add SGPIO node.
Date: Tue, 8 Jun 2021 10:25:32 +0800 [thread overview]
Message-ID: <20210608022531.GA2948@aspeedtech.com> (raw)
In-Reply-To: <5277db96-4eb8-4794-a1fa-6a5bc40bffb7@www.fastmail.com>
The 06/08/2021 07:28, Andrew Jeffery wrote:
> On Mon, 7 Jun 2021, at 16:45, Steven Lee wrote:
> > AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
> > with 80 pins.
> >
> > Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> > ---
> > arch/arm/boot/dts/aspeed-g6.dtsi | 30 ++++++++++++++++++++++++++++++
> > 1 file changed, 30 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> > index f96607b7b4e2..c09b24824b6d 100644
> > --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> > +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> > @@ -377,6 +377,36 @@
> > #interrupt-cells = <2>;
> > };
> >
> > + sgpiom0: sgpiom@1e780500 {
> > + #gpio-cells = <2>;
> > + gpio-controller;
> > + compatible = "aspeed,ast2600-sgpiom-128";
> > + reg = <0x1e780500 0x100>;
> > + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> > + ngpios = <128>;
>
> Doesn't this affect the way the data is presented on the bus?
>
I add ngpios in aspeed-g6.dtsi as it can be overridden by dts files and
driver won't return error if users only add status = "okay" in
dts files without adding ngpios property.
I will remove the property from aspeed-g6.dtsi if we don't need a
default value for ngpios.
> My understanding is this should be defined by each platform, not in the dtsi. Having said that, it appears it is specified in aspeed-g5.dtsi (as the value 8?).
>
I will remove the property from aspeed-g5 in a separate patch.
Thanks,
Steven
> > + clocks = <&syscon ASPEED_CLK_APB2>;
> > + interrupt-controller;
> > + bus-frequency = <12000000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_sgpm1_default>;
> > + status = "disabled";
> > + };
> > +
> > + sgpiom1: sgpiom@1e780600 {
> > + #gpio-cells = <2>;
> > + gpio-controller;
> > + compatible = "aspeed,ast2600-sgpiom-80";
> > + reg = <0x1e780600 0x100>;
> > + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
> > + ngpios = <80>;
>
> As above.
>
> Andrew
WARNING: multiple messages have this Message-ID (diff)
From: Steven Lee <steven_lee@aspeedtech.com>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@lists.ozlabs.org>,
open list <linux-kernel@vger.kernel.org>,
Hongwei Zhang <Hongweiz@ami.com>,
Ryan Chen <ryan_chen@aspeedtech.com>,
Billy Tsai <billy_tsai@aspeedtech.com>
Subject: Re: [PATCH v4 3/7] ARM: dts: aspeed-g6: Add SGPIO node.
Date: Tue, 8 Jun 2021 10:25:32 +0800 [thread overview]
Message-ID: <20210608022531.GA2948@aspeedtech.com> (raw)
In-Reply-To: <5277db96-4eb8-4794-a1fa-6a5bc40bffb7@www.fastmail.com>
The 06/08/2021 07:28, Andrew Jeffery wrote:
> On Mon, 7 Jun 2021, at 16:45, Steven Lee wrote:
> > AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
> > with 80 pins.
> >
> > Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> > ---
> > arch/arm/boot/dts/aspeed-g6.dtsi | 30 ++++++++++++++++++++++++++++++
> > 1 file changed, 30 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> > index f96607b7b4e2..c09b24824b6d 100644
> > --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> > +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> > @@ -377,6 +377,36 @@
> > #interrupt-cells = <2>;
> > };
> >
> > + sgpiom0: sgpiom@1e780500 {
> > + #gpio-cells = <2>;
> > + gpio-controller;
> > + compatible = "aspeed,ast2600-sgpiom-128";
> > + reg = <0x1e780500 0x100>;
> > + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> > + ngpios = <128>;
>
> Doesn't this affect the way the data is presented on the bus?
>
I add ngpios in aspeed-g6.dtsi as it can be overridden by dts files and
driver won't return error if users only add status = "okay" in
dts files without adding ngpios property.
I will remove the property from aspeed-g6.dtsi if we don't need a
default value for ngpios.
> My understanding is this should be defined by each platform, not in the dtsi. Having said that, it appears it is specified in aspeed-g5.dtsi (as the value 8?).
>
I will remove the property from aspeed-g5 in a separate patch.
Thanks,
Steven
> > + clocks = <&syscon ASPEED_CLK_APB2>;
> > + interrupt-controller;
> > + bus-frequency = <12000000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_sgpm1_default>;
> > + status = "disabled";
> > + };
> > +
> > + sgpiom1: sgpiom@1e780600 {
> > + #gpio-cells = <2>;
> > + gpio-controller;
> > + compatible = "aspeed,ast2600-sgpiom-80";
> > + reg = <0x1e780600 0x100>;
> > + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
> > + ngpios = <80>;
>
> As above.
>
> Andrew
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next prev parent reply other threads:[~2021-06-08 2:25 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 7:15 [PATCH v4 0/7] ASPEED sgpio driver enhancement Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` [PATCH v4 1/7] dt-bindings: aspeed-sgpio: Convert txt bindings to yaml Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` [PATCH v4 2/7] dt-bindings: aspeed-sgpio: Add ast2600 sgpio compatibles Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 23:22 ` Andrew Jeffery
2021-06-07 23:22 ` Andrew Jeffery
2021-06-07 23:22 ` Andrew Jeffery
2021-06-07 7:15 ` [PATCH v4 3/7] ARM: dts: aspeed-g6: Add SGPIO node Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 23:28 ` Andrew Jeffery
2021-06-07 23:28 ` Andrew Jeffery
2021-06-07 23:28 ` Andrew Jeffery
2021-06-08 2:25 ` Steven Lee [this message]
2021-06-08 2:25 ` Steven Lee
2021-06-08 2:25 ` Steven Lee
2021-06-07 7:15 ` [PATCH v4 4/7] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 23:43 ` Andrew Jeffery
2021-06-07 23:43 ` Andrew Jeffery
2021-06-07 23:43 ` Andrew Jeffery
2021-06-08 2:50 ` Steven Lee
2021-06-08 2:50 ` Steven Lee
2021-06-08 2:50 ` Steven Lee
2021-06-08 3:22 ` Andrew Jeffery
2021-06-08 3:22 ` Andrew Jeffery
2021-06-08 3:22 ` Andrew Jeffery
2021-06-07 7:15 ` [PATCH v4 5/7] gpio: gpio-aspeed-sgpio: Add set_config function Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 23:48 ` Andrew Jeffery
2021-06-07 23:48 ` Andrew Jeffery
2021-06-07 23:48 ` Andrew Jeffery
2021-06-07 7:15 ` [PATCH v4 6/7] gpio: gpio-aspeed-sgpio: Move irq_chip to aspeed-sgpio struct Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` [PATCH v4 7/7] gpio: gpio-aspeed-sgpio: Use generic device property APIs Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 7:15 ` Steven Lee
2021-06-07 23:52 ` Andrew Jeffery
2021-06-07 23:52 ` Andrew Jeffery
2021-06-07 23:52 ` Andrew Jeffery
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