From: Rob Herring <robh@kernel.org>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH v5 02/10] dt-bindings: aspeed-sgpio: Add ast2600 sgpio compatibles.
Date: Thu, 10 Jun 2021 11:23:20 -0500 [thread overview]
Message-ID: <20210610162320.GA1910317@robh.at.kernel.org> (raw)
In-Reply-To: <20210608102547.4880-3-steven_lee@aspeedtech.com>
On Tue, Jun 08, 2021 at 06:25:37PM +0800, Steven Lee wrote:
> AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
> with 80 pins. Add ast2600-sgpiom0-80 and ast2600-sgpiom-128 compatibles
> and update descriptions to introduce the max number of available gpio
> pins that AST2600 supported.
>
> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> index b2ae211411ff..0e42eded3c1e 100644
> --- a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> +++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> @@ -10,9 +10,10 @@ maintainers:
> - Andrew Jeffery <andrew@aj.id.au>
>
> description:
> - This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
> - featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
> - support the following options
> + This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
> + AST2600 have two sgpio master one with 128 pins another one with 80 pins,
> + AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
> + GPIO pins can be programmed to support the following options
> - Support interrupt option for each input port and various interrupt
> sensitivity option (level-high, level-low, edge-high, edge-low)
> - Support reset tolerance option for each output port
> @@ -25,6 +26,8 @@ properties:
> enum:
> - aspeed,ast2400-sgpio
> - aspeed,ast2500-sgpio
> + - aspeed,ast2600-sgpiom-80
> + - aspeed,ast2600-sgpiom-128
If the number of GPIOs is the only difference, then I don't think you
should get rid of ngpios. It's one thing if it varies from one SoC to
the next, but if something is per instance we should have a property.
Rob
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Steven Lee <steven_lee@aspeedtech.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@lists.ozlabs.org>,
open list <linux-kernel@vger.kernel.org>,
Hongweiz@ami.com, ryan_chen@aspeedtech.com,
billy_tsai@aspeedtech.com
Subject: Re: [PATCH v5 02/10] dt-bindings: aspeed-sgpio: Add ast2600 sgpio compatibles.
Date: Thu, 10 Jun 2021 11:23:20 -0500 [thread overview]
Message-ID: <20210610162320.GA1910317@robh.at.kernel.org> (raw)
In-Reply-To: <20210608102547.4880-3-steven_lee@aspeedtech.com>
On Tue, Jun 08, 2021 at 06:25:37PM +0800, Steven Lee wrote:
> AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
> with 80 pins. Add ast2600-sgpiom0-80 and ast2600-sgpiom-128 compatibles
> and update descriptions to introduce the max number of available gpio
> pins that AST2600 supported.
>
> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> index b2ae211411ff..0e42eded3c1e 100644
> --- a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> +++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> @@ -10,9 +10,10 @@ maintainers:
> - Andrew Jeffery <andrew@aj.id.au>
>
> description:
> - This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
> - featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
> - support the following options
> + This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
> + AST2600 have two sgpio master one with 128 pins another one with 80 pins,
> + AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
> + GPIO pins can be programmed to support the following options
> - Support interrupt option for each input port and various interrupt
> sensitivity option (level-high, level-low, edge-high, edge-low)
> - Support reset tolerance option for each output port
> @@ -25,6 +26,8 @@ properties:
> enum:
> - aspeed,ast2400-sgpio
> - aspeed,ast2500-sgpio
> + - aspeed,ast2600-sgpiom-80
> + - aspeed,ast2600-sgpiom-128
If the number of GPIOs is the only difference, then I don't think you
should get rid of ngpios. It's one thing if it varies from one SoC to
the next, but if something is per instance we should have a property.
Rob
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Steven Lee <steven_lee@aspeedtech.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@lists.ozlabs.org>,
open list <linux-kernel@vger.kernel.org>,
Hongweiz@ami.com, ryan_chen@aspeedtech.com,
billy_tsai@aspeedtech.com
Subject: Re: [PATCH v5 02/10] dt-bindings: aspeed-sgpio: Add ast2600 sgpio compatibles.
Date: Thu, 10 Jun 2021 11:23:20 -0500 [thread overview]
Message-ID: <20210610162320.GA1910317@robh.at.kernel.org> (raw)
In-Reply-To: <20210608102547.4880-3-steven_lee@aspeedtech.com>
On Tue, Jun 08, 2021 at 06:25:37PM +0800, Steven Lee wrote:
> AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
> with 80 pins. Add ast2600-sgpiom0-80 and ast2600-sgpiom-128 compatibles
> and update descriptions to introduce the max number of available gpio
> pins that AST2600 supported.
>
> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> index b2ae211411ff..0e42eded3c1e 100644
> --- a/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> +++ b/Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
> @@ -10,9 +10,10 @@ maintainers:
> - Andrew Jeffery <andrew@aj.id.au>
>
> description:
> - This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
> - featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
> - support the following options
> + This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
> + AST2600 have two sgpio master one with 128 pins another one with 80 pins,
> + AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
> + GPIO pins can be programmed to support the following options
> - Support interrupt option for each input port and various interrupt
> sensitivity option (level-high, level-low, edge-high, edge-low)
> - Support reset tolerance option for each output port
> @@ -25,6 +26,8 @@ properties:
> enum:
> - aspeed,ast2400-sgpio
> - aspeed,ast2500-sgpio
> + - aspeed,ast2600-sgpiom-80
> + - aspeed,ast2600-sgpiom-128
If the number of GPIOs is the only difference, then I don't think you
should get rid of ngpios. It's one thing if it varies from one SoC to
the next, but if something is per instance we should have a property.
Rob
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next prev parent reply other threads:[~2021-06-10 16:23 UTC|newest]
Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 10:25 [PATCH v5 00/10] ASPEED sgpio driver enhancement Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` [PATCH v5 01/10] dt-bindings: aspeed-sgpio: Convert txt bindings to yaml Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-09 0:42 ` Andrew Jeffery
2021-06-09 0:42 ` Andrew Jeffery
2021-06-09 0:42 ` Andrew Jeffery
2021-06-10 16:18 ` Rob Herring
2021-06-10 16:18 ` Rob Herring
2021-06-10 16:18 ` Rob Herring
2021-06-08 10:25 ` [PATCH v5 02/10] dt-bindings: aspeed-sgpio: Add ast2600 sgpio compatibles Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-10 16:23 ` Rob Herring [this message]
2021-06-10 16:23 ` Rob Herring
2021-06-10 16:23 ` Rob Herring
2021-06-10 23:27 ` Andrew Jeffery
2021-06-10 23:27 ` Andrew Jeffery
2021-06-10 23:27 ` Andrew Jeffery
2021-06-16 15:20 ` Rob Herring
2021-06-16 15:20 ` Rob Herring
2021-06-16 15:20 ` Rob Herring
2021-06-08 10:25 ` [PATCH v5 03/10] ARM: dts: aspeed-g6: Add SGPIO node Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-09 0:43 ` Andrew Jeffery
2021-06-09 0:43 ` Andrew Jeffery
2021-06-09 0:43 ` Andrew Jeffery
2021-06-09 1:51 ` Steven Lee
2021-06-09 1:51 ` Steven Lee
2021-06-09 1:51 ` Steven Lee
2021-06-09 2:19 ` Andrew Jeffery
2021-06-09 2:19 ` Andrew Jeffery
2021-06-09 2:19 ` Andrew Jeffery
2021-06-08 10:25 ` [PATCH v5 04/10] ARM: dts: aspeed-g5: Remove ngpios from sgpio node Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-09 0:45 ` Andrew Jeffery
2021-06-09 0:45 ` Andrew Jeffery
2021-06-09 0:45 ` Andrew Jeffery
2021-06-08 10:25 ` [PATCH v5 05/10] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-09 0:52 ` Andrew Jeffery
2021-06-09 0:52 ` Andrew Jeffery
2021-06-09 0:52 ` Andrew Jeffery
2021-06-08 10:25 ` [PATCH v5 06/10] gpio: gpio-aspeed-sgpio: Add AST2400 and AST2500 platform data Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-09 0:55 ` Andrew Jeffery
2021-06-09 0:55 ` Andrew Jeffery
2021-06-09 0:55 ` Andrew Jeffery
2021-06-09 4:12 ` Steven Lee
2021-06-09 4:12 ` Steven Lee
2021-06-09 4:12 ` Steven Lee
2021-06-09 6:45 ` Andrew Jeffery
2021-06-09 6:45 ` Andrew Jeffery
2021-06-09 6:45 ` Andrew Jeffery
2021-06-11 19:02 ` Bartosz Golaszewski
2021-06-11 19:02 ` Bartosz Golaszewski
2021-06-11 19:02 ` Bartosz Golaszewski
2021-06-15 4:22 ` Steven Lee
2021-06-15 4:22 ` Steven Lee
2021-06-15 4:22 ` Steven Lee
2021-06-08 10:25 ` [PATCH v5 07/10] gpio: gpio-aspeed-sgpio: Add set_config function Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` [PATCH v5 08/10] gpio: gpio-aspeed-sgpio: Move irq_chip to aspeed-sgpio struct Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` [PATCH v5 09/10] gpio: gpio-aspeed-sgpio: Use generic device property APIs Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` [PATCH v5 10/10] gpio: gpio-aspeed-sgpio: Return error if ngpios is not multiple of 8 Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-08 10:25 ` Steven Lee
2021-06-09 0:56 ` Andrew Jeffery
2021-06-09 0:56 ` Andrew Jeffery
2021-06-09 0:56 ` Andrew Jeffery
2021-06-09 10:54 ` [PATCH v5 00/10] ASPEED sgpio driver enhancement Linus Walleij
2021-06-09 10:54 ` Linus Walleij
2021-06-09 10:54 ` Linus Walleij
2021-06-10 2:24 ` Steven Lee
2021-06-10 2:24 ` Steven Lee
2021-06-10 2:24 ` Steven Lee
2021-06-10 7:50 ` Linus Walleij
2021-06-10 7:50 ` Linus Walleij
2021-06-10 7:50 ` Linus Walleij
2021-06-10 8:39 ` Steven Lee
2021-06-10 8:39 ` Steven Lee
2021-06-10 8:39 ` Steven Lee
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