From: Rob Herring <robh@kernel.org>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
linuxarm@huawei.com, mauro.chehab@huawei.com,
Kishon Vijay Abraham I <kishon@ti.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v7 06/10] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY
Date: Fri, 23 Jul 2021 16:50:59 -0600 [thread overview]
Message-ID: <20210723225059.GA2727093@robh.at.kernel.org> (raw)
In-Reply-To: <946f2426bc542638240980931eae924c57f2ba27.1626855713.git.mchehab+huawei@kernel.org>
On Wed, Jul 21, 2021 at 10:39:08AM +0200, Mauro Carvalho Chehab wrote:
> Document the bindings for HiKey 970 (hi3670) PCIe PHY
> interface, supported via the pcie-kirin driver.
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> ---
> .../phy/hisilicon,phy-hi3670-pcie.yaml | 95 +++++++++++++++++++
> 1 file changed, 95 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml b/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
> new file mode 100644
> index 000000000000..a5ea13332cac
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/hisilicon,phy-hi3670-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HiSilicon Kirin970 PCIe PHY
> +
> +maintainers:
> + - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> +
> +description: |+
> + Bindings for PCIe PHY on HiSilicon Kirin 970.
> +
> +properties:
> + compatible:
> + const: hisilicon,hi970-pcie-phy
> +
> + "#phy-cells":
> + const: 0
> +
> + reg:
> + maxItems: 1
> + description: PHY Control registers
> +
> + phy-supply:
> + description: The PCIe PHY power supply
> +
> + clocks:
> + items:
> + - description: PCIe PHY clock
> + - description: PCIe AUX clock
> + - description: PCIe APB PHY clock
> + - description: PCIe APB SYS clock
> + - description: PCIe ACLK clock
> +
> + clock-names:
> + items:
> + - const: phy_ref
> + - const: aux
> + - const: apb_phy
> + - const: apb_sys
> + - const: aclk
> +
> + reset-gpios:
> + description: PCI PERST reset GPIOs
> + maxItems: 4
> +
> + clkreq-gpios:
> + description: Clock request GPIOs
> + maxItems: 3
Again, this will not work.
It boils down to this fails to describe how the GPIOs are connected
which is the point of GPIOs in DT. This in no way captures the hierarchy
of devices. While you may be lucky that you can just assert or
deassert all the lines at one time, that's not likely to work in a
more complicated case (such as having to power up/down each device).
I realize the right solution is more complex, but that's the only way to
handle this in a host bridge and board independent way.
If you want the simple solution, just configure all these GPIOs in
firmware before Linux boots.
Rob
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
linuxarm@huawei.com, mauro.chehab@huawei.com,
Kishon Vijay Abraham I <kishon@ti.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v7 06/10] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY
Date: Fri, 23 Jul 2021 16:50:59 -0600 [thread overview]
Message-ID: <20210723225059.GA2727093@robh.at.kernel.org> (raw)
In-Reply-To: <946f2426bc542638240980931eae924c57f2ba27.1626855713.git.mchehab+huawei@kernel.org>
On Wed, Jul 21, 2021 at 10:39:08AM +0200, Mauro Carvalho Chehab wrote:
> Document the bindings for HiKey 970 (hi3670) PCIe PHY
> interface, supported via the pcie-kirin driver.
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> ---
> .../phy/hisilicon,phy-hi3670-pcie.yaml | 95 +++++++++++++++++++
> 1 file changed, 95 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml b/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
> new file mode 100644
> index 000000000000..a5ea13332cac
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/hisilicon,phy-hi3670-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: HiSilicon Kirin970 PCIe PHY
> +
> +maintainers:
> + - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
> +
> +description: |+
> + Bindings for PCIe PHY on HiSilicon Kirin 970.
> +
> +properties:
> + compatible:
> + const: hisilicon,hi970-pcie-phy
> +
> + "#phy-cells":
> + const: 0
> +
> + reg:
> + maxItems: 1
> + description: PHY Control registers
> +
> + phy-supply:
> + description: The PCIe PHY power supply
> +
> + clocks:
> + items:
> + - description: PCIe PHY clock
> + - description: PCIe AUX clock
> + - description: PCIe APB PHY clock
> + - description: PCIe APB SYS clock
> + - description: PCIe ACLK clock
> +
> + clock-names:
> + items:
> + - const: phy_ref
> + - const: aux
> + - const: apb_phy
> + - const: apb_sys
> + - const: aclk
> +
> + reset-gpios:
> + description: PCI PERST reset GPIOs
> + maxItems: 4
> +
> + clkreq-gpios:
> + description: Clock request GPIOs
> + maxItems: 3
Again, this will not work.
It boils down to this fails to describe how the GPIOs are connected
which is the point of GPIOs in DT. This in no way captures the hierarchy
of devices. While you may be lucky that you can just assert or
deassert all the lines at one time, that's not likely to work in a
more complicated case (such as having to power up/down each device).
I realize the right solution is more complex, but that's the only way to
handle this in a host bridge and board independent way.
If you want the simple solution, just configure all these GPIOs in
firmware before Linux boots.
Rob
next prev parent reply other threads:[~2021-07-23 22:51 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-21 8:39 [PATCH v7 00/10] Add support for Hikey 970 PCIe Mauro Carvalho Chehab
2021-07-21 8:39 ` Mauro Carvalho Chehab
2021-07-21 8:39 ` Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 01/10] PCI: kirin: Reorganize the PHY logic inside the driver Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 02/10] PCI: kirin: Add support for a PHY layer Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 03/10] PCI: kirin: Use regmap for APB registers Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 04/10] PCI: kirin: Add MODULE_* macros Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 05/10] dt-bindings: PCI: kirin: Fix compatible string Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 06/10] dt-bindings: phy: Add bindings for HiKey 970 PCIe PHY Mauro Carvalho Chehab
2021-07-21 8:39 ` Mauro Carvalho Chehab
2021-07-23 22:50 ` Rob Herring [this message]
2021-07-23 22:50 ` Rob Herring
2021-07-24 0:12 ` Mauro Carvalho Chehab
2021-07-24 0:12 ` Mauro Carvalho Chehab
2021-07-26 21:37 ` Rob Herring
2021-07-26 21:37 ` Rob Herring
2021-07-26 23:50 ` Mauro Carvalho Chehab
2021-07-26 23:50 ` Mauro Carvalho Chehab
2021-07-27 6:52 ` Mauro Carvalho Chehab
2021-07-27 6:52 ` Mauro Carvalho Chehab
2021-07-27 22:17 ` Rob Herring
2021-07-27 22:17 ` Rob Herring
2021-07-28 7:38 ` Mauro Carvalho Chehab
2021-07-28 7:38 ` Mauro Carvalho Chehab
2021-07-28 14:28 ` Rob Herring
2021-07-28 14:28 ` Rob Herring
2021-07-29 10:12 ` Mauro Carvalho Chehab
2021-07-29 10:12 ` Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 07/10] phy: HiSilicon: Add driver for Kirin " Mauro Carvalho Chehab
2021-07-21 8:39 ` Mauro Carvalho Chehab
2021-07-21 8:39 ` [PATCH v7 08/10] arm64: dts: HiSilicon: Add support for HiKey 970 PCIe controller hardware Mauro Carvalho Chehab
2021-07-21 8:39 ` Mauro Carvalho Chehab
2021-07-22 13:36 ` Manivannan Sadhasivam
2021-07-22 13:36 ` Manivannan Sadhasivam
2021-07-23 6:53 ` Mauro Carvalho Chehab
2021-07-23 6:53 ` Mauro Carvalho Chehab
2021-07-24 4:11 ` Manivannan Sadhasivam
2021-07-24 4:11 ` Manivannan Sadhasivam
2021-08-03 4:25 ` Mauro Carvalho Chehab
2021-08-03 4:25 ` Mauro Carvalho Chehab
2021-08-16 18:26 ` Rob Herring
2021-08-16 18:26 ` Rob Herring
2021-07-21 8:39 ` [PATCH v7 09/10] dt-bindings: PCI: kirin-pcie.txt: Convert it to yaml Mauro Carvalho Chehab
2021-07-23 22:56 ` Rob Herring
2021-07-21 8:39 ` [PATCH v7 10/10] phy-hi3670-pcie: Move reset-gpios to the PCIe DT schema Mauro Carvalho Chehab
2021-07-21 8:39 ` Mauro Carvalho Chehab
2021-07-21 8:39 ` Mauro Carvalho Chehab
2021-07-21 10:15 ` [PATCH v7 11/10] PCI: kirin: Allow building it as a module Mauro Carvalho Chehab
2021-07-21 11:55 ` Arnd Bergmann
2021-07-21 13:10 ` Mauro Carvalho Chehab
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