From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Ulf Hansson" <ulf.hansson@linaro.org>,
"Viresh Kumar" <vireshk@kernel.org>,
"Stephen Boyd" <sboyd@kernel.org>,
"Peter De Schrijver" <pdeschrijver@nvidia.com>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Peter Chen" <peter.chen@kernel.org>,
"Mark Brown" <broonie@kernel.org>,
"Lee Jones" <lee.jones@linaro.org>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Nishanth Menon" <nm@ti.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Richard Weinberger" <richard@nod.at>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Lucas Stach" <dev@lynxeye.de>, "Stefan Agner" <stefan@agner.ch>,
"Adrian Hunter" <adrian.hunter@intel.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-pm@vger.kernel.org, linux-usb@vger.kernel.org,
linux-staging@lists.linux.dev, linux-spi@vger.kernel.org,
linux-pwm@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-mmc@vger.kernel.org, linux-media@vger.kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: [PATCH v8 14/34] drm/tegra: gr2d: Support power management
Date: Tue, 17 Aug 2021 04:27:34 +0300 [thread overview]
Message-ID: <20210817012754.8710-15-digetx@gmail.com> (raw)
In-Reply-To: <20210817012754.8710-1-digetx@gmail.com>
Add power management to the GR2D driver.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/gpu/drm/tegra/gr2d.c | 154 +++++++++++++++++++++++++++++++++--
1 file changed, 146 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tegra/gr2d.c b/drivers/gpu/drm/tegra/gr2d.c
index de288cba3905..4ad8709933a9 100644
--- a/drivers/gpu/drm/tegra/gr2d.c
+++ b/drivers/gpu/drm/tegra/gr2d.c
@@ -7,11 +7,22 @@
#include <linux/iommu.h>
#include <linux/module.h>
#include <linux/of_device.h>
+#include <linux/pm_opp.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+
+#include <soc/tegra/common.h>
#include "drm.h"
#include "gem.h"
#include "gr2d.h"
+enum {
+ RST_GR2D_MC,
+ RST_GR2D,
+ RST_GR2D_MAX,
+};
+
struct gr2d_soc {
unsigned int version;
};
@@ -21,6 +32,9 @@ struct gr2d {
struct host1x_channel *channel;
struct clk *clk;
+ struct reset_control_bulk_data resets[RST_GR2D_MAX];
+ unsigned int nresets;
+
const struct gr2d_soc *soc;
DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
@@ -190,6 +204,27 @@ static const u32 gr2d_addr_regs[] = {
GR2D_VA_BASE_ADDR_SB,
};
+static int gr2d_get_resets(struct device *dev, struct gr2d *gr2d)
+{
+ int err;
+
+ gr2d->resets[RST_GR2D_MC].id = "mc";
+ gr2d->resets[RST_GR2D].id = "2d";
+ gr2d->nresets = RST_GR2D_MAX;
+
+ err = devm_reset_control_bulk_get_optional_exclusive_released(
+ dev, gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to get reset: %d\n", err);
+ return err;
+ }
+
+ if (WARN_ON(!gr2d->resets[RST_GR2D].rstc))
+ return -ENOENT;
+
+ return 0;
+}
+
static int gr2d_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -202,6 +237,8 @@ static int gr2d_probe(struct platform_device *pdev)
if (!gr2d)
return -ENOMEM;
+ platform_set_drvdata(pdev, gr2d);
+
gr2d->soc = of_device_get_match_data(dev);
syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
@@ -214,11 +251,13 @@ static int gr2d_probe(struct platform_device *pdev)
return PTR_ERR(gr2d->clk);
}
- err = clk_prepare_enable(gr2d->clk);
- if (err) {
- dev_err(dev, "cannot turn on clock\n");
+ err = devm_tegra_core_dev_init_opp_table_simple(dev);
+ if (err)
+ return err;
+
+ err = gr2d_get_resets(dev, gr2d);
+ if (err)
return err;
- }
INIT_LIST_HEAD(&gr2d->client.base.list);
gr2d->client.base.ops = &gr2d_client_ops;
@@ -231,20 +270,27 @@ static int gr2d_probe(struct platform_device *pdev)
gr2d->client.version = gr2d->soc->version;
gr2d->client.ops = &gr2d_ops;
+ pm_runtime_enable(dev);
+ pm_runtime_use_autosuspend(dev);
+ pm_runtime_set_autosuspend_delay(dev, 200);
+
err = host1x_client_register(&gr2d->client.base);
if (err < 0) {
dev_err(dev, "failed to register host1x client: %d\n", err);
- clk_disable_unprepare(gr2d->clk);
- return err;
+ goto disable_rpm;
}
/* initialize address register map */
for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
- platform_set_drvdata(pdev, gr2d);
-
return 0;
+
+disable_rpm:
+ pm_runtime_dont_use_autosuspend(dev);
+ pm_runtime_disable(dev);
+
+ return err;
}
static int gr2d_remove(struct platform_device *pdev)
@@ -259,15 +305,107 @@ static int gr2d_remove(struct platform_device *pdev)
return err;
}
+ pm_runtime_dont_use_autosuspend(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
+static int __maybe_unused gr2d_runtime_suspend(struct device *dev)
+{
+ struct gr2d *gr2d = dev_get_drvdata(dev);
+ int err;
+
+ host1x_channel_stop(gr2d->channel);
+ reset_control_bulk_release(gr2d->nresets, gr2d->resets);
+
+ /*
+ * GR2D module shouldn't be reset while hardware is idling, otherwise
+ * host1x's cmdproc will stuck on trying to access any G2 register
+ * after reset. GR2D module could be either hot-reset or reset after
+ * power-gating of the HEG partition. Hence we will put in reset only
+ * the memory client part of the module, the HEG GENPD will take care
+ * of resetting GR2D module across power-gating.
+ *
+ * On Tegra20 there is no HEG partition, but it's okay to have
+ * undetermined h/w state since userspace is expected to reprogram
+ * the state on each job submission anyways.
+ */
+ err = reset_control_acquire(gr2d->resets[RST_GR2D_MC].rstc);
+ if (err) {
+ dev_err(dev, "failed to acquire MC reset: %d\n", err);
+ goto acquire_reset;
+ }
+
+ err = reset_control_assert(gr2d->resets[RST_GR2D_MC].rstc);
+ reset_control_release(gr2d->resets[RST_GR2D_MC].rstc);
+ if (err) {
+ dev_err(dev, "failed to assert MC reset: %d\n", err);
+ goto acquire_reset;
+ }
+
clk_disable_unprepare(gr2d->clk);
return 0;
+
+acquire_reset:
+ reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);
+ reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);
+
+ return err;
}
+static int __maybe_unused gr2d_runtime_resume(struct device *dev)
+{
+ struct gr2d *gr2d = dev_get_drvdata(dev);
+ int err;
+
+ err = reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to acquire reset: %d\n", err);
+ return err;
+ }
+
+ err = dev_pm_opp_sync(dev);
+ if (err) {
+ dev_err(dev, "failed to sync OPP: %d\n", err);
+ goto release_reset;
+ }
+
+ err = clk_prepare_enable(gr2d->clk);
+ if (err) {
+ dev_err(dev, "failed to enable clock: %d\n", err);
+ goto release_reset;
+ }
+
+ /* this is a reset array which deasserts both 2D MC and 2D itself */
+ err = reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to deassert reset: %d\n", err);
+ goto disable_clk;
+ }
+
+ return 0;
+
+disable_clk:
+ clk_disable_unprepare(gr2d->clk);
+release_reset:
+ reset_control_bulk_release(gr2d->nresets, gr2d->resets);
+
+ return err;
+}
+
+static const struct dev_pm_ops tegra_gr2d_pm = {
+ SET_RUNTIME_PM_OPS(gr2d_runtime_suspend, gr2d_runtime_resume, NULL)
+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
+};
+
struct platform_driver tegra_gr2d_driver = {
.driver = {
.name = "tegra-gr2d",
.of_match_table = gr2d_match,
+ .pm = &tegra_gr2d_pm,
},
.probe = gr2d_probe,
.remove = gr2d_remove,
--
2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Ulf Hansson" <ulf.hansson@linaro.org>,
"Viresh Kumar" <vireshk@kernel.org>,
"Stephen Boyd" <sboyd@kernel.org>,
"Peter De Schrijver" <pdeschrijver@nvidia.com>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Peter Chen" <peter.chen@kernel.org>,
"Mark Brown" <broonie@kernel.org>,
"Lee Jones" <lee.jones@linaro.org>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Nishanth Menon" <nm@ti.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Richard Weinberger" <richard@nod.at>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Lucas Stach" <dev@lynxeye.de>, "Stefan Agner" <stefan@agner.ch>,
"Adrian Hunter" <adrian.hunter@intel.com>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-pm@vger.kernel.org, linux-usb@vger.kernel.org,
linux-staging@lists.linux.dev, linux-spi@vger.kernel.org,
linux-pwm@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-mmc@vger.kernel.org, linux-media@vger.kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: [PATCH v8 14/34] drm/tegra: gr2d: Support power management
Date: Tue, 17 Aug 2021 04:27:34 +0300 [thread overview]
Message-ID: <20210817012754.8710-15-digetx@gmail.com> (raw)
In-Reply-To: <20210817012754.8710-1-digetx@gmail.com>
Add power management to the GR2D driver.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/gpu/drm/tegra/gr2d.c | 154 +++++++++++++++++++++++++++++++++--
1 file changed, 146 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tegra/gr2d.c b/drivers/gpu/drm/tegra/gr2d.c
index de288cba3905..4ad8709933a9 100644
--- a/drivers/gpu/drm/tegra/gr2d.c
+++ b/drivers/gpu/drm/tegra/gr2d.c
@@ -7,11 +7,22 @@
#include <linux/iommu.h>
#include <linux/module.h>
#include <linux/of_device.h>
+#include <linux/pm_opp.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+
+#include <soc/tegra/common.h>
#include "drm.h"
#include "gem.h"
#include "gr2d.h"
+enum {
+ RST_GR2D_MC,
+ RST_GR2D,
+ RST_GR2D_MAX,
+};
+
struct gr2d_soc {
unsigned int version;
};
@@ -21,6 +32,9 @@ struct gr2d {
struct host1x_channel *channel;
struct clk *clk;
+ struct reset_control_bulk_data resets[RST_GR2D_MAX];
+ unsigned int nresets;
+
const struct gr2d_soc *soc;
DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
@@ -190,6 +204,27 @@ static const u32 gr2d_addr_regs[] = {
GR2D_VA_BASE_ADDR_SB,
};
+static int gr2d_get_resets(struct device *dev, struct gr2d *gr2d)
+{
+ int err;
+
+ gr2d->resets[RST_GR2D_MC].id = "mc";
+ gr2d->resets[RST_GR2D].id = "2d";
+ gr2d->nresets = RST_GR2D_MAX;
+
+ err = devm_reset_control_bulk_get_optional_exclusive_released(
+ dev, gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to get reset: %d\n", err);
+ return err;
+ }
+
+ if (WARN_ON(!gr2d->resets[RST_GR2D].rstc))
+ return -ENOENT;
+
+ return 0;
+}
+
static int gr2d_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -202,6 +237,8 @@ static int gr2d_probe(struct platform_device *pdev)
if (!gr2d)
return -ENOMEM;
+ platform_set_drvdata(pdev, gr2d);
+
gr2d->soc = of_device_get_match_data(dev);
syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
@@ -214,11 +251,13 @@ static int gr2d_probe(struct platform_device *pdev)
return PTR_ERR(gr2d->clk);
}
- err = clk_prepare_enable(gr2d->clk);
- if (err) {
- dev_err(dev, "cannot turn on clock\n");
+ err = devm_tegra_core_dev_init_opp_table_simple(dev);
+ if (err)
+ return err;
+
+ err = gr2d_get_resets(dev, gr2d);
+ if (err)
return err;
- }
INIT_LIST_HEAD(&gr2d->client.base.list);
gr2d->client.base.ops = &gr2d_client_ops;
@@ -231,20 +270,27 @@ static int gr2d_probe(struct platform_device *pdev)
gr2d->client.version = gr2d->soc->version;
gr2d->client.ops = &gr2d_ops;
+ pm_runtime_enable(dev);
+ pm_runtime_use_autosuspend(dev);
+ pm_runtime_set_autosuspend_delay(dev, 200);
+
err = host1x_client_register(&gr2d->client.base);
if (err < 0) {
dev_err(dev, "failed to register host1x client: %d\n", err);
- clk_disable_unprepare(gr2d->clk);
- return err;
+ goto disable_rpm;
}
/* initialize address register map */
for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
- platform_set_drvdata(pdev, gr2d);
-
return 0;
+
+disable_rpm:
+ pm_runtime_dont_use_autosuspend(dev);
+ pm_runtime_disable(dev);
+
+ return err;
}
static int gr2d_remove(struct platform_device *pdev)
@@ -259,15 +305,107 @@ static int gr2d_remove(struct platform_device *pdev)
return err;
}
+ pm_runtime_dont_use_autosuspend(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
+static int __maybe_unused gr2d_runtime_suspend(struct device *dev)
+{
+ struct gr2d *gr2d = dev_get_drvdata(dev);
+ int err;
+
+ host1x_channel_stop(gr2d->channel);
+ reset_control_bulk_release(gr2d->nresets, gr2d->resets);
+
+ /*
+ * GR2D module shouldn't be reset while hardware is idling, otherwise
+ * host1x's cmdproc will stuck on trying to access any G2 register
+ * after reset. GR2D module could be either hot-reset or reset after
+ * power-gating of the HEG partition. Hence we will put in reset only
+ * the memory client part of the module, the HEG GENPD will take care
+ * of resetting GR2D module across power-gating.
+ *
+ * On Tegra20 there is no HEG partition, but it's okay to have
+ * undetermined h/w state since userspace is expected to reprogram
+ * the state on each job submission anyways.
+ */
+ err = reset_control_acquire(gr2d->resets[RST_GR2D_MC].rstc);
+ if (err) {
+ dev_err(dev, "failed to acquire MC reset: %d\n", err);
+ goto acquire_reset;
+ }
+
+ err = reset_control_assert(gr2d->resets[RST_GR2D_MC].rstc);
+ reset_control_release(gr2d->resets[RST_GR2D_MC].rstc);
+ if (err) {
+ dev_err(dev, "failed to assert MC reset: %d\n", err);
+ goto acquire_reset;
+ }
+
clk_disable_unprepare(gr2d->clk);
return 0;
+
+acquire_reset:
+ reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);
+ reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);
+
+ return err;
}
+static int __maybe_unused gr2d_runtime_resume(struct device *dev)
+{
+ struct gr2d *gr2d = dev_get_drvdata(dev);
+ int err;
+
+ err = reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to acquire reset: %d\n", err);
+ return err;
+ }
+
+ err = dev_pm_opp_sync(dev);
+ if (err) {
+ dev_err(dev, "failed to sync OPP: %d\n", err);
+ goto release_reset;
+ }
+
+ err = clk_prepare_enable(gr2d->clk);
+ if (err) {
+ dev_err(dev, "failed to enable clock: %d\n", err);
+ goto release_reset;
+ }
+
+ /* this is a reset array which deasserts both 2D MC and 2D itself */
+ err = reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to deassert reset: %d\n", err);
+ goto disable_clk;
+ }
+
+ return 0;
+
+disable_clk:
+ clk_disable_unprepare(gr2d->clk);
+release_reset:
+ reset_control_bulk_release(gr2d->nresets, gr2d->resets);
+
+ return err;
+}
+
+static const struct dev_pm_ops tegra_gr2d_pm = {
+ SET_RUNTIME_PM_OPS(gr2d_runtime_suspend, gr2d_runtime_resume, NULL)
+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
+};
+
struct platform_driver tegra_gr2d_driver = {
.driver = {
.name = "tegra-gr2d",
.of_match_table = gr2d_match,
+ .pm = &tegra_gr2d_pm,
},
.probe = gr2d_probe,
.remove = gr2d_remove,
--
2.32.0
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2021-08-17 1:32 UTC|newest]
Thread overview: 238+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-17 1:27 [PATCH v8 00/34] NVIDIA Tegra power management patches for 5.16 Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 01/34] opp: Add dev_pm_opp_sync() helper Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 7:55 ` Viresh Kumar
2021-08-17 7:55 ` Viresh Kumar
2021-08-17 15:49 ` Dmitry Osipenko
2021-08-17 15:49 ` Dmitry Osipenko
2021-08-18 3:55 ` Viresh Kumar
2021-08-18 3:55 ` Viresh Kumar
2021-08-18 4:12 ` Dmitry Osipenko
2021-08-18 4:12 ` Dmitry Osipenko
2021-08-18 4:29 ` Dmitry Osipenko
2021-08-18 4:29 ` Dmitry Osipenko
2021-08-18 4:30 ` Dmitry Osipenko
2021-08-18 4:30 ` Dmitry Osipenko
2021-08-18 4:34 ` Viresh Kumar
2021-08-18 4:34 ` Viresh Kumar
2021-08-18 4:31 ` Viresh Kumar
2021-08-18 4:31 ` Viresh Kumar
2021-08-18 4:37 ` Dmitry Osipenko
2021-08-18 4:37 ` Dmitry Osipenko
2021-08-18 4:53 ` Viresh Kumar
2021-08-18 4:53 ` Viresh Kumar
2021-08-18 5:21 ` Dmitry Osipenko
2021-08-18 5:21 ` Dmitry Osipenko
2021-08-18 5:58 ` Viresh Kumar
2021-08-18 5:58 ` Viresh Kumar
2021-08-18 6:00 ` Viresh Kumar
2021-08-18 6:00 ` Viresh Kumar
2021-08-18 6:22 ` Dmitry Osipenko
2021-08-18 6:22 ` Dmitry Osipenko
2021-08-18 6:27 ` Viresh Kumar
2021-08-18 6:27 ` Viresh Kumar
2021-08-18 8:29 ` Ulf Hansson
2021-08-18 8:29 ` Ulf Hansson
2021-08-18 9:14 ` Viresh Kumar
2021-08-18 9:14 ` Viresh Kumar
2021-08-18 9:41 ` Ulf Hansson
2021-08-18 9:41 ` Ulf Hansson
2021-08-18 9:42 ` Ulf Hansson
2021-08-18 9:42 ` Ulf Hansson
2021-08-18 9:50 ` Viresh Kumar
2021-08-18 9:50 ` Viresh Kumar
2021-08-18 10:08 ` Ulf Hansson
2021-08-18 10:08 ` Ulf Hansson
2021-08-18 15:43 ` Dmitry Osipenko
2021-08-18 15:43 ` Dmitry Osipenko
2021-08-18 15:46 ` Dmitry Osipenko
2021-08-18 15:46 ` Dmitry Osipenko
2021-08-19 13:07 ` Ulf Hansson
2021-08-19 13:07 ` Ulf Hansson
2021-08-19 19:35 ` Dmitry Osipenko
2021-08-19 19:35 ` Dmitry Osipenko
2021-08-20 5:07 ` Viresh Kumar
2021-08-20 5:07 ` Viresh Kumar
2021-08-20 12:42 ` Ulf Hansson
2021-08-20 12:42 ` Ulf Hansson
2021-08-21 17:34 ` Dmitry Osipenko
2021-08-21 17:34 ` Dmitry Osipenko
2021-08-23 10:46 ` Ulf Hansson
2021-08-23 10:46 ` Ulf Hansson
2021-08-23 15:54 ` Dmitry Osipenko
2021-08-23 15:54 ` Dmitry Osipenko
2021-08-18 15:55 ` Dmitry Osipenko
2021-08-18 15:55 ` Dmitry Osipenko
2021-08-19 6:16 ` Viresh Kumar
2021-08-19 6:16 ` Viresh Kumar
2021-08-19 14:55 ` Ulf Hansson
2021-08-19 14:55 ` Ulf Hansson
2021-08-20 5:18 ` Viresh Kumar
2021-08-20 5:18 ` Viresh Kumar
2021-08-20 12:57 ` Ulf Hansson
2021-08-20 12:57 ` Ulf Hansson
2021-08-23 20:24 ` Dmitry Osipenko
2021-08-23 20:24 ` Dmitry Osipenko
2021-08-24 3:04 ` Viresh Kumar
2021-08-24 3:04 ` Viresh Kumar
2021-08-22 18:35 ` Dmitry Osipenko
2021-08-22 18:35 ` Dmitry Osipenko
2021-08-25 15:41 ` Dmitry Osipenko
2021-08-25 15:41 ` Dmitry Osipenko
2021-08-26 2:54 ` Viresh Kumar
2021-08-26 2:54 ` Viresh Kumar
2021-08-26 2:55 ` Viresh Kumar
2021-08-26 2:55 ` Viresh Kumar
2021-08-17 1:27 ` [PATCH v8 02/34] soc/tegra: pmc: Disable PMC state syncing Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 03/34] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 04/34] soc/tegra: Add devm_tegra_core_dev_init_opp_table_simple() Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 05/34] soc/tegra: Use dev_pm_opp_sync() Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 06/34] dt-bindings: clock: tegra-car: Document new tegra-clocks sub-node Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-18 1:15 ` Rob Herring
2021-08-18 1:15 ` Rob Herring
2021-08-18 1:44 ` Dmitry Osipenko
2021-08-18 1:44 ` Dmitry Osipenko
2021-08-18 13:52 ` Thierry Reding
2021-08-18 13:52 ` Thierry Reding
2021-08-18 15:04 ` Dmitry Osipenko
2021-08-18 15:04 ` Dmitry Osipenko
2021-08-18 13:59 ` Thierry Reding
2021-08-18 13:59 ` Thierry Reding
2021-08-18 15:05 ` Dmitry Osipenko
2021-08-18 15:05 ` Dmitry Osipenko
2021-08-18 16:39 ` Thierry Reding
2021-08-18 16:39 ` Thierry Reding
2021-08-18 16:57 ` Dmitry Osipenko
2021-08-18 16:57 ` Dmitry Osipenko
2021-08-18 17:16 ` Dmitry Osipenko
2021-08-18 17:16 ` Dmitry Osipenko
2021-08-19 16:31 ` Thierry Reding
2021-08-19 16:31 ` Thierry Reding
2021-08-19 22:20 ` Dmitry Osipenko
2021-08-19 22:20 ` Dmitry Osipenko
2021-08-20 2:51 ` Dmitry Osipenko
2021-08-20 2:51 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 07/34] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-18 14:07 ` Thierry Reding
2021-08-18 14:07 ` Thierry Reding
2021-08-18 15:05 ` Dmitry Osipenko
2021-08-18 15:05 ` Dmitry Osipenko
2021-08-18 16:42 ` Thierry Reding
2021-08-18 16:42 ` Thierry Reding
2021-08-18 17:11 ` Dmitry Osipenko
2021-08-18 17:11 ` Dmitry Osipenko
2021-08-19 16:54 ` Thierry Reding
2021-08-19 16:54 ` Thierry Reding
2021-08-19 22:09 ` Dmitry Osipenko
2021-08-19 22:09 ` Dmitry Osipenko
2021-08-20 11:42 ` Thierry Reding
2021-08-20 11:42 ` Thierry Reding
2021-08-20 13:08 ` Ulf Hansson
2021-08-20 13:08 ` Ulf Hansson
2021-08-21 17:45 ` Dmitry Osipenko
2021-08-21 17:45 ` Dmitry Osipenko
2021-08-23 14:33 ` Thierry Reding
2021-08-23 14:33 ` Thierry Reding
2021-08-23 18:54 ` Dmitry Osipenko
2021-08-23 18:54 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 08/34] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 09/34] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-18 1:16 ` Rob Herring
2021-08-18 1:16 ` Rob Herring
2021-08-18 1:37 ` Dmitry Osipenko
2021-08-18 1:37 ` Dmitry Osipenko
2021-08-18 2:04 ` Dmitry Osipenko
2021-08-18 2:04 ` Dmitry Osipenko
2021-08-18 2:07 ` Dmitry Osipenko
2021-08-18 2:07 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 10/34] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 11/34] gpu: host1x: Add runtime PM and OPP support Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 12:04 ` Ulf Hansson
2021-08-17 12:04 ` Ulf Hansson
2021-08-17 14:02 ` Thierry Reding
2021-08-17 14:02 ` Thierry Reding
2021-08-18 8:35 ` Ulf Hansson
2021-08-18 8:35 ` Ulf Hansson
2021-08-18 17:24 ` Dmitry Osipenko
2021-08-18 17:24 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 12/34] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 13/34] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko [this message]
2021-08-17 1:27 ` [PATCH v8 14/34] drm/tegra: gr2d: Support power management Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 15/34] drm/tegra: gr3d: " Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 16/34] drm/tegra: vic: Support system suspend Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 17/34] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 18/34] bus: tegra-gmi: " Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 19/34] pwm: tegra: " Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-19 13:21 ` Thierry Reding
2021-08-19 13:21 ` Thierry Reding
2021-08-19 14:04 ` Ulf Hansson
2021-08-19 14:04 ` Ulf Hansson
2021-08-19 16:17 ` Thierry Reding
2021-08-19 16:17 ` Thierry Reding
2021-08-17 1:27 ` [PATCH v8 20/34] mmc: sdhci-tegra: " Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-19 17:03 ` Thierry Reding
2021-08-19 17:03 ` Thierry Reding
2021-08-19 22:37 ` Dmitry Osipenko
2021-08-19 22:37 ` Dmitry Osipenko
2021-08-20 11:35 ` Thierry Reding
2021-08-20 11:35 ` Thierry Reding
2021-08-25 9:45 ` Dmitry Osipenko
2021-08-25 9:45 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 21/34] mtd: rawnand: tegra: " Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 8:41 ` Miquel Raynal
2021-08-17 8:41 ` Miquel Raynal
2021-08-17 1:27 ` [PATCH v8 22/34] spi: tegra20-slink: Add " Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 12:22 ` Mark Brown
2021-08-17 12:22 ` Mark Brown
2021-08-17 15:53 ` Dmitry Osipenko
2021-08-17 15:53 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 23/34] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-18 1:17 ` Rob Herring
2021-08-18 1:17 ` Rob Herring
2021-08-17 1:27 ` [PATCH v8 24/34] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-18 1:17 ` Rob Herring
2021-08-18 1:17 ` Rob Herring
2021-08-17 1:27 ` [PATCH v8 25/34] media: staging: tegra-vde: Support generic power domain and OPP Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 26/34] soc/tegra: fuse: Add OPP support Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 27/34] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 28/34] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 29/34] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 30/34] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 31/34] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 32/34] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 33/34] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
2021-08-17 1:27 ` [PATCH v8 34/34] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko
2021-08-17 1:27 ` Dmitry Osipenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210817012754.8710-15-digetx@gmail.com \
--to=digetx@gmail.com \
--cc=adrian.hunter@intel.com \
--cc=broonie@kernel.org \
--cc=dev@lynxeye.de \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=jonathanh@nvidia.com \
--cc=lee.jones@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=linux-staging@lists.linux.dev \
--cc=linux-tegra@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=mchehab@kernel.org \
--cc=miquel.raynal@bootlin.com \
--cc=mperttunen@nvidia.com \
--cc=mturquette@baylibre.com \
--cc=nm@ti.com \
--cc=pdeschrijver@nvidia.com \
--cc=peter.chen@kernel.org \
--cc=richard@nod.at \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=stefan@agner.ch \
--cc=thierry.reding@gmail.com \
--cc=u.kleine-koenig@pengutronix.de \
--cc=ulf.hansson@linaro.org \
--cc=vigneshr@ti.com \
--cc=vireshk@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.