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* [PATCH for-next 0/3] Enable or remove hardware features
@ 2021-08-21  9:53 Wenpeng Liang
  2021-08-21  9:53 ` [PATCH for-next 1/3] RDMA/hns: Remove unsupport cmdq mode Wenpeng Liang
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Wenpeng Liang @ 2021-08-21  9:53 UTC (permalink / raw)
  To: dledford, jgg; +Cc: linux-rdma, linuxarm, liangwenpeng

No bugs occur, just enable features or remove redundant flags.

Lang Cheng (2):
  RDMA/hns: Remove unsupport cmdq mode
  RDMA/hns: Ownerbit mode add control field

Yixing Liu (1):
  RDMA/hns: Enable stash feature of HIP09

 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 25 +++++++++++--------------
 drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 20 +++++++-------------
 2 files changed, 18 insertions(+), 27 deletions(-)

--
2.8.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH for-next 1/3] RDMA/hns: Remove unsupport cmdq mode
  2021-08-21  9:53 [PATCH for-next 0/3] Enable or remove hardware features Wenpeng Liang
@ 2021-08-21  9:53 ` Wenpeng Liang
  2021-08-21  9:53 ` [PATCH for-next 2/3] RDMA/hns: Enable stash feature of HIP09 Wenpeng Liang
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Wenpeng Liang @ 2021-08-21  9:53 UTC (permalink / raw)
  To: dledford, jgg; +Cc: linux-rdma, linuxarm, liangwenpeng

From: Lang Cheng <chenglang@huawei.com>

CMDQ support un-interrupt mode only, and firmware ignores this mode flag,
so remove it.

Fixes: a04ff739f2a9 ("RDMA/hns: Add command queue support for hip08 RoCE driver")
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 21 +++++++--------------
 drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 20 +++++++-------------
 2 files changed, 14 insertions(+), 27 deletions(-)

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 4677c48..514473f 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1255,8 +1255,7 @@ static void hns_roce_cmq_setup_basic_desc(struct hns_roce_cmq_desc *desc,
 {
 	memset((void *)desc, 0, sizeof(struct hns_roce_cmq_desc));
 	desc->opcode = cpu_to_le16(opcode);
-	desc->flag =
-		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+	desc->flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
 	if (is_read)
 		desc->flag |= cpu_to_le16(HNS_ROCE_CMD_FLAG_WR);
 	else
@@ -1295,16 +1294,11 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
 	/* Write to hardware */
 	roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, csq->head);
 
-	/* If the command is sync, wait for the firmware to write back,
-	 * if multi descriptors to be sent, use the first one to check
-	 */
-	if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
-		do {
-			if (hns_roce_cmq_csq_done(hr_dev))
-				break;
-			udelay(1);
-		} while (++timeout < priv->cmq.tx_timeout);
-	}
+	do {
+		if (hns_roce_cmq_csq_done(hr_dev))
+			break;
+		udelay(1);
+	} while (++timeout < priv->cmq.tx_timeout);
 
 	if (hns_roce_cmq_csq_done(hr_dev)) {
 		for (ret = 0, i = 0; i < num; i++) {
@@ -1768,8 +1762,7 @@ static int __hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev,
 	if (ret)
 		return ret;
 
-	desc.flag =
-		cpu_to_le16(HNS_ROCE_CMD_FLAG_NO_INTR | HNS_ROCE_CMD_FLAG_IN);
+	desc.flag = cpu_to_le16(HNS_ROCE_CMD_FLAG_IN);
 	desc.flag &= cpu_to_le16(~HNS_ROCE_CMD_FLAG_WR);
 	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LPBK_S, 1);
 	roce_set_bit(swt->cfg, VF_SWITCH_DATA_CFG_ALW_LCL_LPBK_S, 0);
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 3f758d6..212799d 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -129,19 +129,13 @@
 
 #define HNS_ROCE_V2_TABLE_CHUNK_SIZE		(1 << 18)
 
-#define HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT	0
-#define HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT	1
-#define HNS_ROCE_CMD_FLAG_NEXT_SHIFT		2
-#define HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT	3
-#define HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT		4
-#define HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT	5
-
-#define HNS_ROCE_CMD_FLAG_IN		BIT(HNS_ROCE_CMD_FLAG_IN_VALID_SHIFT)
-#define HNS_ROCE_CMD_FLAG_OUT		BIT(HNS_ROCE_CMD_FLAG_OUT_VALID_SHIFT)
-#define HNS_ROCE_CMD_FLAG_NEXT		BIT(HNS_ROCE_CMD_FLAG_NEXT_SHIFT)
-#define HNS_ROCE_CMD_FLAG_WR		BIT(HNS_ROCE_CMD_FLAG_WR_OR_RD_SHIFT)
-#define HNS_ROCE_CMD_FLAG_NO_INTR	BIT(HNS_ROCE_CMD_FLAG_NO_INTR_SHIFT)
-#define HNS_ROCE_CMD_FLAG_ERR_INTR	BIT(HNS_ROCE_CMD_FLAG_ERR_INTR_SHIFT)
+enum {
+	HNS_ROCE_CMD_FLAG_IN = BIT(0),
+	HNS_ROCE_CMD_FLAG_OUT = BIT(1),
+	HNS_ROCE_CMD_FLAG_NEXT = BIT(2),
+	HNS_ROCE_CMD_FLAG_WR = BIT(3),
+	HNS_ROCE_CMD_FLAG_ERR_INTR = BIT(5),
+};
 
 #define HNS_ROCE_CMQ_DESC_NUM_S		3
 
-- 
2.8.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH for-next 2/3] RDMA/hns: Enable stash feature of HIP09
  2021-08-21  9:53 [PATCH for-next 0/3] Enable or remove hardware features Wenpeng Liang
  2021-08-21  9:53 ` [PATCH for-next 1/3] RDMA/hns: Remove unsupport cmdq mode Wenpeng Liang
@ 2021-08-21  9:53 ` Wenpeng Liang
  2021-08-21  9:53 ` [PATCH for-next 3/3] RDMA/hns: Ownerbit mode add control field Wenpeng Liang
  2021-08-23 16:54 ` [PATCH for-next 0/3] Enable or remove hardware features Jason Gunthorpe
  3 siblings, 0 replies; 5+ messages in thread
From: Wenpeng Liang @ 2021-08-21  9:53 UTC (permalink / raw)
  To: dledford, jgg; +Cc: linux-rdma, linuxarm, liangwenpeng

From: Yixing Liu <liuyixing1@huawei.com>

The stash feature is enabled by default on HIP09.

Fixes: f93c39bc9547 ("RDMA/hns: Add support for QP stash")
Fixes: bfefae9f108d ("RDMA/hns: Add support for CQ stash")
Signed-off-by: Yixing Liu <liuyixing1@huawei.com>
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 514473f..cbc8739 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -2004,6 +2004,7 @@ static void set_default_caps(struct hns_roce_dev *hr_dev)
 	caps->gid_table_len[0] = HNS_ROCE_V2_GID_INDEX_NUM;
 
 	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) {
+		caps->flags |= HNS_ROCE_CAP_FLAG_STASH;
 		caps->max_sq_inline = HNS_ROCE_V3_MAX_SQ_INLINE;
 	} else {
 		caps->max_sq_inline = HNS_ROCE_V2_MAX_SQ_INLINE;
-- 
2.8.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH for-next 3/3] RDMA/hns: Ownerbit mode add control field
  2021-08-21  9:53 [PATCH for-next 0/3] Enable or remove hardware features Wenpeng Liang
  2021-08-21  9:53 ` [PATCH for-next 1/3] RDMA/hns: Remove unsupport cmdq mode Wenpeng Liang
  2021-08-21  9:53 ` [PATCH for-next 2/3] RDMA/hns: Enable stash feature of HIP09 Wenpeng Liang
@ 2021-08-21  9:53 ` Wenpeng Liang
  2021-08-23 16:54 ` [PATCH for-next 0/3] Enable or remove hardware features Jason Gunthorpe
  3 siblings, 0 replies; 5+ messages in thread
From: Wenpeng Liang @ 2021-08-21  9:53 UTC (permalink / raw)
  To: dledford, jgg; +Cc: linux-rdma, linuxarm, liangwenpeng

From: Lang Cheng <chenglang@huawei.com>

The ownerbit mode is for external card mode. Make it controlled by the
firmware.

Fixes:aba457ca890c("RDMA/hns: Support owner mode doorbell")
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index cbc8739..9188dd6 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -4143,6 +4143,9 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp,
 	if (hr_qp->en_flags & HNS_ROCE_QP_CAP_RQ_RECORD_DB)
 		hr_reg_enable(context, QPC_RQ_RECORD_EN);
 
+	if (hr_qp->en_flags & HNS_ROCE_QP_CAP_OWNER_DB)
+		hr_reg_enable(context, QPC_OWNER_MODE);
+
 	hr_reg_write(context, QPC_RQ_DB_RECORD_ADDR_L,
 		     lower_32_bits(hr_qp->rdb.dma) >> 1);
 	hr_reg_write(context, QPC_RQ_DB_RECORD_ADDR_H,
-- 
2.8.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH for-next 0/3] Enable or remove hardware features
  2021-08-21  9:53 [PATCH for-next 0/3] Enable or remove hardware features Wenpeng Liang
                   ` (2 preceding siblings ...)
  2021-08-21  9:53 ` [PATCH for-next 3/3] RDMA/hns: Ownerbit mode add control field Wenpeng Liang
@ 2021-08-23 16:54 ` Jason Gunthorpe
  3 siblings, 0 replies; 5+ messages in thread
From: Jason Gunthorpe @ 2021-08-23 16:54 UTC (permalink / raw)
  To: Wenpeng Liang; +Cc: dledford, linux-rdma, linuxarm

On Sat, Aug 21, 2021 at 05:53:24PM +0800, Wenpeng Liang wrote:
> No bugs occur, just enable features or remove redundant flags.
> 
> Lang Cheng (2):
>   RDMA/hns: Remove unsupport cmdq mode
>   RDMA/hns: Ownerbit mode add control field
> 
> Yixing Liu (1):
>   RDMA/hns: Enable stash feature of HIP09

Applied to for-next, thanks

Jason

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2021-08-23 16:54 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-08-21  9:53 [PATCH for-next 0/3] Enable or remove hardware features Wenpeng Liang
2021-08-21  9:53 ` [PATCH for-next 1/3] RDMA/hns: Remove unsupport cmdq mode Wenpeng Liang
2021-08-21  9:53 ` [PATCH for-next 2/3] RDMA/hns: Enable stash feature of HIP09 Wenpeng Liang
2021-08-21  9:53 ` [PATCH for-next 3/3] RDMA/hns: Ownerbit mode add control field Wenpeng Liang
2021-08-23 16:54 ` [PATCH for-next 0/3] Enable or remove hardware features Jason Gunthorpe

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