From: Roger Quadros <rogerq@kernel.org>
To: tony@atomide.com
Cc: robh+dt@kernel.org, krzysztof.kozlowski@canonical.com,
miquel.raynal@bootlin.com, nm@ti.com, lokeshvutla@ti.com,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org,
Roger Quadros <rogerq@kernel.org>
Subject: [PATCH v2 6/6] dt-bindings: net: Remove gpmc-eth.txt
Date: Thu, 2 Sep 2021 12:56:09 +0300 [thread overview]
Message-ID: <20210902095609.16583-7-rogerq@kernel.org> (raw)
In-Reply-To: <20210902095609.16583-1-rogerq@kernel.org>
There is no GPMC Ethernet compatible or device driver. GPMC is
just a bus interface over which devices like Ethernet controller
can be to.
For SMSC 911x Ethernet chip bindings, please refer to
Documentation/devicetree/bindings/net/smsc,lan9115.yaml
For GPMC bus timing configuration, please refer to
Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
.../devicetree/bindings/net/gpmc-eth.txt | 97 -------------------
1 file changed, 97 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/net/gpmc-eth.txt
diff --git a/Documentation/devicetree/bindings/net/gpmc-eth.txt b/Documentation/devicetree/bindings/net/gpmc-eth.txt
deleted file mode 100644
index 5e2f610455fa..000000000000
--- a/Documentation/devicetree/bindings/net/gpmc-eth.txt
+++ /dev/null
@@ -1,97 +0,0 @@
-Device tree bindings for Ethernet chip connected to TI GPMC
-
-Besides being used to interface with external memory devices, the
-General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
-such as ethernet controllers to processors using the TI GPMC as a data bus.
-
-Ethernet controllers connected to TI GPMC are represented as child nodes of
-the GPMC controller with an "ethernet" name.
-
-All timing relevant properties as well as generic GPMC child properties are
-explained in a separate documents. Please refer to
-Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
-
-For the properties relevant to the ethernet controller connected to the GPMC
-refer to the binding documentation of the device. For example, the documentation
-for the SMSC 911x is Documentation/devicetree/bindings/net/smsc,lan9115.yaml
-
-Child nodes need to specify the GPMC bus address width using the "bank-width"
-property but is possible that an ethernet controller also has a property to
-specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
-address width, it supports devices with 32-bit word registers.
-For example with an SMSC LAN911x/912x controller connected to the TI GPMC on an
-OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
-
-Required properties:
-- bank-width: Address width of the device in bytes. GPMC supports 8-bit
- and 16-bit devices and so must be either 1 or 2 bytes.
-- compatible: Compatible string property for the ethernet child device.
-- gpmc,cs-on-ns: Chip-select assertion time
-- gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
-- gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
-- gpmc,oe-on-ns: Output-enable assertion time
-- gpmc,oe-off-ns: Output-enable de-assertion time
-- gpmc,we-on-ns: Write-enable assertion time
-- gpmc,we-off-ns: Write-enable de-assertion time
-- gpmc,access-ns: Start cycle to first data capture (read access)
-- gpmc,rd-cycle-ns: Total read cycle time
-- gpmc,wr-cycle-ns: Total write cycle time
-- reg: Chip-select, base address (relative to chip-select)
- and size of the memory mapped for the device.
- Note that base address will be typically 0 as this
- is the start of the chip-select.
-
-Optional properties:
-- gpmc,XXX Additional GPMC timings and settings parameters. See
- Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
-
-Example:
-
-gpmc: gpmc@6e000000 {
- compatible = "ti,omap3430-gpmc";
- ti,hwmods = "gpmc";
- reg = <0x6e000000 0x1000>;
- interrupts = <20>;
- gpmc,num-cs = <8>;
- gpmc,num-waitpins = <4>;
- #address-cells = <2>;
- #size-cells = <1>;
-
- ranges = <5 0 0x2c000000 0x1000000>;
-
- ethernet@5,0 {
- compatible = "smsc,lan9221", "smsc,lan9115";
- reg = <5 0 0xff>;
- bank-width = <2>;
-
- gpmc,mux-add-data;
- gpmc,cs-on-ns = <0>;
- gpmc,cs-rd-off-ns = <186>;
- gpmc,cs-wr-off-ns = <186>;
- gpmc,adv-on-ns = <12>;
- gpmc,adv-rd-off-ns = <48>;
- gpmc,adv-wr-off-ns = <48>;
- gpmc,oe-on-ns = <54>;
- gpmc,oe-off-ns = <168>;
- gpmc,we-on-ns = <54>;
- gpmc,we-off-ns = <168>;
- gpmc,rd-cycle-ns = <186>;
- gpmc,wr-cycle-ns = <186>;
- gpmc,access-ns = <114>;
- gpmc,page-burst-access-ns = <6>;
- gpmc,bus-turnaround-ns = <12>;
- gpmc,cycle2cycle-delay-ns = <18>;
- gpmc,wr-data-mux-bus-ns = <90>;
- gpmc,wr-access-ns = <186>;
- gpmc,cycle2cycle-samecsen;
- gpmc,cycle2cycle-diffcsen;
-
- interrupt-parent = <&gpio6>;
- interrupts = <16>;
- vmmc-supply = <&vddvario>;
- vmmc_aux-supply = <&vdd33a>;
- reg-io-width = <4>;
-
- smsc,save-mac-address;
- };
-};
--
2.17.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@kernel.org>
To: tony@atomide.com
Cc: robh+dt@kernel.org, krzysztof.kozlowski@canonical.com,
miquel.raynal@bootlin.com, nm@ti.com, lokeshvutla@ti.com,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org,
Roger Quadros <rogerq@kernel.org>
Subject: [PATCH v2 6/6] dt-bindings: net: Remove gpmc-eth.txt
Date: Thu, 2 Sep 2021 12:56:09 +0300 [thread overview]
Message-ID: <20210902095609.16583-7-rogerq@kernel.org> (raw)
In-Reply-To: <20210902095609.16583-1-rogerq@kernel.org>
There is no GPMC Ethernet compatible or device driver. GPMC is
just a bus interface over which devices like Ethernet controller
can be to.
For SMSC 911x Ethernet chip bindings, please refer to
Documentation/devicetree/bindings/net/smsc,lan9115.yaml
For GPMC bus timing configuration, please refer to
Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
.../devicetree/bindings/net/gpmc-eth.txt | 97 -------------------
1 file changed, 97 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/net/gpmc-eth.txt
diff --git a/Documentation/devicetree/bindings/net/gpmc-eth.txt b/Documentation/devicetree/bindings/net/gpmc-eth.txt
deleted file mode 100644
index 5e2f610455fa..000000000000
--- a/Documentation/devicetree/bindings/net/gpmc-eth.txt
+++ /dev/null
@@ -1,97 +0,0 @@
-Device tree bindings for Ethernet chip connected to TI GPMC
-
-Besides being used to interface with external memory devices, the
-General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
-such as ethernet controllers to processors using the TI GPMC as a data bus.
-
-Ethernet controllers connected to TI GPMC are represented as child nodes of
-the GPMC controller with an "ethernet" name.
-
-All timing relevant properties as well as generic GPMC child properties are
-explained in a separate documents. Please refer to
-Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
-
-For the properties relevant to the ethernet controller connected to the GPMC
-refer to the binding documentation of the device. For example, the documentation
-for the SMSC 911x is Documentation/devicetree/bindings/net/smsc,lan9115.yaml
-
-Child nodes need to specify the GPMC bus address width using the "bank-width"
-property but is possible that an ethernet controller also has a property to
-specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
-address width, it supports devices with 32-bit word registers.
-For example with an SMSC LAN911x/912x controller connected to the TI GPMC on an
-OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
-
-Required properties:
-- bank-width: Address width of the device in bytes. GPMC supports 8-bit
- and 16-bit devices and so must be either 1 or 2 bytes.
-- compatible: Compatible string property for the ethernet child device.
-- gpmc,cs-on-ns: Chip-select assertion time
-- gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
-- gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
-- gpmc,oe-on-ns: Output-enable assertion time
-- gpmc,oe-off-ns: Output-enable de-assertion time
-- gpmc,we-on-ns: Write-enable assertion time
-- gpmc,we-off-ns: Write-enable de-assertion time
-- gpmc,access-ns: Start cycle to first data capture (read access)
-- gpmc,rd-cycle-ns: Total read cycle time
-- gpmc,wr-cycle-ns: Total write cycle time
-- reg: Chip-select, base address (relative to chip-select)
- and size of the memory mapped for the device.
- Note that base address will be typically 0 as this
- is the start of the chip-select.
-
-Optional properties:
-- gpmc,XXX Additional GPMC timings and settings parameters. See
- Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml
-
-Example:
-
-gpmc: gpmc@6e000000 {
- compatible = "ti,omap3430-gpmc";
- ti,hwmods = "gpmc";
- reg = <0x6e000000 0x1000>;
- interrupts = <20>;
- gpmc,num-cs = <8>;
- gpmc,num-waitpins = <4>;
- #address-cells = <2>;
- #size-cells = <1>;
-
- ranges = <5 0 0x2c000000 0x1000000>;
-
- ethernet@5,0 {
- compatible = "smsc,lan9221", "smsc,lan9115";
- reg = <5 0 0xff>;
- bank-width = <2>;
-
- gpmc,mux-add-data;
- gpmc,cs-on-ns = <0>;
- gpmc,cs-rd-off-ns = <186>;
- gpmc,cs-wr-off-ns = <186>;
- gpmc,adv-on-ns = <12>;
- gpmc,adv-rd-off-ns = <48>;
- gpmc,adv-wr-off-ns = <48>;
- gpmc,oe-on-ns = <54>;
- gpmc,oe-off-ns = <168>;
- gpmc,we-on-ns = <54>;
- gpmc,we-off-ns = <168>;
- gpmc,rd-cycle-ns = <186>;
- gpmc,wr-cycle-ns = <186>;
- gpmc,access-ns = <114>;
- gpmc,page-burst-access-ns = <6>;
- gpmc,bus-turnaround-ns = <12>;
- gpmc,cycle2cycle-delay-ns = <18>;
- gpmc,wr-data-mux-bus-ns = <90>;
- gpmc,wr-access-ns = <186>;
- gpmc,cycle2cycle-samecsen;
- gpmc,cycle2cycle-diffcsen;
-
- interrupt-parent = <&gpio6>;
- interrupts = <16>;
- vmmc-supply = <&vddvario>;
- vmmc_aux-supply = <&vdd33a>;
- reg-io-width = <4>;
-
- smsc,save-mac-address;
- };
-};
--
2.17.1
next prev parent reply other threads:[~2021-09-02 9:59 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-02 9:56 [PATCH v2 0/6] dt-bindings: memory-controllers: ti, gpmc: Convert to yaml Roger Quadros
2021-09-02 9:56 ` [PATCH v2 0/6] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros
2021-09-02 9:56 ` [PATCH v2 1/6] ARM: dts: omap: Fixup GPMC child nodes Roger Quadros
2021-09-02 9:56 ` Roger Quadros
2021-09-02 9:56 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: Convert to yaml Roger Quadros
2021-09-02 9:56 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros
2021-09-02 12:03 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: " Rob Herring
2021-09-02 12:03 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Rob Herring
2021-09-02 14:21 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: " Roger Quadros
2021-09-02 14:21 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros
2021-09-02 19:56 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: " Rob Herring
2021-09-02 19:56 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Rob Herring
2021-09-03 9:35 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: " Roger Quadros
2021-09-03 9:35 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros
2021-09-03 20:41 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: " Rob Herring
2021-09-03 20:41 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Rob Herring
2021-09-06 7:10 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: " Roger Quadros
2021-09-06 7:10 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros
2021-09-02 20:19 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti, gpmc: " Rob Herring
2021-09-02 20:19 ` [PATCH v2 2/6] dt-bindings: memory-controllers: ti,gpmc: " Rob Herring
2021-09-02 9:56 ` [PATCH v2 3/6] dt-bindings: mtd: ti,gpmc-nand: " Roger Quadros
2021-09-02 9:56 ` Roger Quadros
2021-09-02 9:56 ` [PATCH v2 4/6] dt-bindings: mtd: ti,gpmc-onenand: " Roger Quadros
2021-09-02 9:56 ` Roger Quadros
2021-09-02 9:56 ` [PATCH v2 5/6] dt-bindings: mtd: Remove gpmc-nor.txt Roger Quadros
2021-09-02 9:56 ` Roger Quadros
2021-09-02 9:56 ` Roger Quadros [this message]
2021-09-02 9:56 ` [PATCH v2 6/6] dt-bindings: net: Remove gpmc-eth.txt Roger Quadros
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210902095609.16583-7-rogerq@kernel.org \
--to=rogerq@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-omap@vger.kernel.org \
--cc=lokeshvutla@ti.com \
--cc=miquel.raynal@bootlin.com \
--cc=nm@ti.com \
--cc=robh+dt@kernel.org \
--cc=tony@atomide.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.