* [PATCH v3 1/4] parisc: move virt_map macro to assembly.h
2021-10-14 19:49 [PATCH v3 0/4] add TOC support Sven Schnelle
@ 2021-10-14 19:49 ` Sven Schnelle
2021-10-14 19:49 ` [PATCH v3 2/4] parisc: add PIM TOC data structures Sven Schnelle
` (3 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Sven Schnelle @ 2021-10-14 19:49 UTC (permalink / raw)
To: Helge Deller; +Cc: linux-parisc
This macro will also be used by the TOC code, so move it
into asm/assembly.h to avoid duplication.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
arch/parisc/include/asm/assembly.h | 25 +++++++++++++++++++++++++
arch/parisc/kernel/entry.S | 24 ------------------------
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h
index a39250cb7dfc..d1d16d7b3607 100644
--- a/arch/parisc/include/asm/assembly.h
+++ b/arch/parisc/include/asm/assembly.h
@@ -71,6 +71,7 @@
#include <asm/types.h>
#include <asm/asmregs.h>
+#include <asm/psw.h>
sp = 30
gp = 27
@@ -497,6 +498,30 @@
nop /* 7 */
.endm
+ /* Switch to virtual mapping, trashing only %r1 */
+ .macro virt_map
+ /* pcxt_ssm_bug */
+ rsm PSW_SM_I, %r0 /* barrier for "Relied upon Translation */
+ mtsp %r0, %sr4
+ mtsp %r0, %sr5
+ mtsp %r0, %sr6
+ tovirt_r1 %r29
+ load32 KERNEL_PSW, %r1
+
+ rsm PSW_SM_QUIET,%r0 /* second "heavy weight" ctl op */
+ mtctl %r0, %cr17 /* Clear IIASQ tail */
+ mtctl %r0, %cr17 /* Clear IIASQ head */
+ mtctl %r1, %ipsw
+ load32 4f, %r1
+ mtctl %r1, %cr18 /* Set IIAOQ tail */
+ ldo 4(%r1), %r1
+ mtctl %r1, %cr18 /* Set IIAOQ head */
+ rfir
+ nop
+4:
+ .endm
+
+
/*
* ASM_EXCEPTIONTABLE_ENTRY
*
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 9f939afe6b88..91e0540e5213 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -51,30 +51,6 @@
extrd,u \spc,(64 - (SPACEID_SHIFT)),32,\prot
.endm
#endif
-
- /* Switch to virtual mapping, trashing only %r1 */
- .macro virt_map
- /* pcxt_ssm_bug */
- rsm PSW_SM_I, %r0 /* barrier for "Relied upon Translation */
- mtsp %r0, %sr4
- mtsp %r0, %sr5
- mtsp %r0, %sr6
- tovirt_r1 %r29
- load32 KERNEL_PSW, %r1
-
- rsm PSW_SM_QUIET,%r0 /* second "heavy weight" ctl op */
- mtctl %r0, %cr17 /* Clear IIASQ tail */
- mtctl %r0, %cr17 /* Clear IIASQ head */
- mtctl %r1, %ipsw
- load32 4f, %r1
- mtctl %r1, %cr18 /* Set IIAOQ tail */
- ldo 4(%r1), %r1
- mtctl %r1, %cr18 /* Set IIAOQ head */
- rfir
- nop
-4:
- .endm
-
/*
* The "get_stack" macros are responsible for determining the
* kernel stack value.
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 2/4] parisc: add PIM TOC data structures
2021-10-14 19:49 [PATCH v3 0/4] add TOC support Sven Schnelle
2021-10-14 19:49 ` [PATCH v3 1/4] parisc: move virt_map macro to assembly.h Sven Schnelle
@ 2021-10-14 19:49 ` Sven Schnelle
2021-10-14 19:49 ` [PATCH v3 3/4] parisc/firmware: add functions to retrieve TOC data Sven Schnelle
` (2 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Sven Schnelle @ 2021-10-14 19:49 UTC (permalink / raw)
To: Helge Deller; +Cc: linux-parisc
These data structures describe the TOC data we get from firmware
when issuing a PDC_PIM_TOC request.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
arch/parisc/include/uapi/asm/pdc.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/parisc/include/uapi/asm/pdc.h b/arch/parisc/include/uapi/asm/pdc.h
index 15211723ebf5..ad51df8ba952 100644
--- a/arch/parisc/include/uapi/asm/pdc.h
+++ b/arch/parisc/include/uapi/asm/pdc.h
@@ -689,6 +689,28 @@ struct pdc_hpmc_pim_20 { /* PDC_PIM */
unsigned long long fr[32];
};
+struct pdc_toc_pim_11 {
+ unsigned int gr[32];
+ unsigned int cr[32];
+ unsigned int sr[8];
+ unsigned int iasq_back;
+ unsigned int iaoq_back;
+ unsigned int check_type;
+ unsigned int hversion;
+ unsigned int cpu_state;
+};
+
+struct pdc_toc_pim_20 {
+ unsigned long long gr[32];
+ unsigned long long cr[32];
+ unsigned long long sr[8];
+ unsigned long long iasq_back;
+ unsigned long long iaoq_back;
+ unsigned int check_type;
+ unsigned int hversion;
+ unsigned int cpu_state;
+};
+
#endif /* !defined(__ASSEMBLY__) */
#endif /* _UAPI_PARISC_PDC_H */
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 3/4] parisc/firmware: add functions to retrieve TOC data
2021-10-14 19:49 [PATCH v3 0/4] add TOC support Sven Schnelle
2021-10-14 19:49 ` [PATCH v3 1/4] parisc: move virt_map macro to assembly.h Sven Schnelle
2021-10-14 19:49 ` [PATCH v3 2/4] parisc: add PIM TOC data structures Sven Schnelle
@ 2021-10-14 19:49 ` Sven Schnelle
2021-10-14 19:49 ` [PATCH v3 4/4] parisc: add support for TOC (transfer of control) Sven Schnelle
2021-10-14 20:27 ` [PATCH v3 0/4] add TOC support Helge Deller
4 siblings, 0 replies; 8+ messages in thread
From: Sven Schnelle @ 2021-10-14 19:49 UTC (permalink / raw)
To: Helge Deller; +Cc: linux-parisc
Add functions to retrieve TOC data from firmware both
for 1.1 and 2.0 PDC.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
arch/parisc/include/asm/pdc.h | 2 ++
arch/parisc/kernel/firmware.c | 32 ++++++++++++++++++++++++++++++++
2 files changed, 34 insertions(+)
diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h
index b388d8176588..18b957a8630d 100644
--- a/arch/parisc/include/asm/pdc.h
+++ b/arch/parisc/include/asm/pdc.h
@@ -51,6 +51,8 @@ int pdc_spaceid_bits(unsigned long *space_bits);
int pdc_btlb_info(struct pdc_btlb_info *btlb);
int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
#endif /* !CONFIG_PA20 */
+int pdc_pim_toc11(struct pdc_toc_pim_11 *ret);
+int pdc_pim_toc20(struct pdc_toc_pim_20 *ret);
int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c
index 7034227dbdf3..3370e347dde3 100644
--- a/arch/parisc/kernel/firmware.c
+++ b/arch/parisc/kernel/firmware.c
@@ -1061,6 +1061,38 @@ int pdc_mem_pdt_read_entries(struct pdc_mem_read_pdt *pret,
return retval;
}
+/**
+ * pdc_pim_toc11 - Fetch TOC PIM 1.1 data from firmware.
+ * @ret: pointer to return buffer
+ */
+int pdc_pim_toc11(struct pdc_toc_pim_11 *ret)
+{
+ int retval;
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
+ retval = mem_pdc_call(PDC_PIM, PDC_PIM_TOC, __pa(pdc_result),
+ __pa(ret), sizeof(*ret));
+ spin_unlock_irqrestore(&pdc_lock, flags);
+ return retval;
+}
+
+/**
+ * pdc_pim_toc20 - Fetch TOC PIM 2.0 data from firmware.
+ * @ret: pointer to return buffer
+ */
+int pdc_pim_toc20(struct pdc_toc_pim_20 *ret)
+{
+ int retval;
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
+ retval = mem_pdc_call(PDC_PIM, PDC_PIM_TOC, __pa(pdc_result),
+ __pa(ret), sizeof(*ret));
+ spin_unlock_irqrestore(&pdc_lock, flags);
+ return retval;
+}
+
/**
* pdc_tod_set - Set the Time-Of-Day clock.
* @sec: The number of seconds since epoch.
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 4/4] parisc: add support for TOC (transfer of control)
2021-10-14 19:49 [PATCH v3 0/4] add TOC support Sven Schnelle
` (2 preceding siblings ...)
2021-10-14 19:49 ` [PATCH v3 3/4] parisc/firmware: add functions to retrieve TOC data Sven Schnelle
@ 2021-10-14 19:49 ` Sven Schnelle
2021-10-16 16:49 ` Rolf Eike Beer
2021-10-14 20:27 ` [PATCH v3 0/4] add TOC support Helge Deller
4 siblings, 1 reply; 8+ messages in thread
From: Sven Schnelle @ 2021-10-14 19:49 UTC (permalink / raw)
To: Helge Deller; +Cc: linux-parisc
Almost all PA-RISC machines have either a button that
is labeled with 'TOC' or a BMC function to trigger a TOC.
TOC is a non-maskable interrupt that is sent to the processor.
This can be used for diagnostic purposes like obtaining a
stack trace/register dump or to enter KDB/KGDB.
As an example, on my c8000, TOC can be used with:
CONFIG_KGDB=y
CONFIG_KGDB_KDB=y
and the 'kgdboc=ttyS0,115200' appended to the command line.
Press ^[( on serial console, which will enter the BMC command line,
and enter 'TOC s':
root@(none):/# (
cli>TOC s
Sending TOC/INIT.
<Cpu3> 2800035d03e00000 0000000040c21ac8 CC_ERR_CHECK_TOC
<Cpu0> 2800035d00e00000 0000000040c21ad0 CC_ERR_CHECK_TOC
<Cpu2> 2800035d02e00000 0000000040c21ac8 CC_ERR_CHECK_TOC
<Cpu1> 2800035d01e00000 0000000040c21ad0 CC_ERR_CHECK_TOC
<Cpu3> 37000f7303e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY
<Cpu0> 37000f7300e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY
<Cpu2> 37000f7302e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY
<Cpu1> 37000f7301e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY
<Cpu3> 4300100803e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC
<Cpu0> 4300100800e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC
<Cpu2> 4300100802e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC
<Cpu1> 4300100801e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC
Entering kdb (current=0x00000000411cef80, pid 0) on processor 0 due to NonMaskable Interrupt @ 0x40c21ad0
[0]kdb>
Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
arch/parisc/Kconfig | 14 ++++
arch/parisc/include/asm/processor.h | 4 +
arch/parisc/include/uapi/asm/pdc.h | 6 +-
arch/parisc/kernel/Makefile | 1 +
arch/parisc/kernel/toc.c | 111 ++++++++++++++++++++++++++++
arch/parisc/kernel/toc_asm.S | 88 ++++++++++++++++++++++
6 files changed, 222 insertions(+), 2 deletions(-)
create mode 100644 arch/parisc/kernel/toc.c
create mode 100644 arch/parisc/kernel/toc_asm.S
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 27a8b49af11f..97a889eaffe1 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -288,6 +288,20 @@ config SMP
If you don't know what to do here, say N.
+config TOC
+ bool "Support TOC switch"
+ default y if 64BIT || !SMP
+ help
+ Most PA-RISC machines have either a switch at the back of the machine
+ or a command in BMC to trigger a TOC interrupt. If you say Y here a
+ handler will be installed which will either show a backtrace on all
+ CPUs, or enter a possible configured debugger like kgdb/kdb.
+
+ Note that with this option enabled, the kernel will use an additional 16KB
+ per possible CPU as a special stack for the TOC handler.
+
+ If you don't want to debug the Kernel, so N.
+
config PARISC_CPU_TOPOLOGY
bool "Support cpu topology definition"
depends on SMP
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
index eeb7da064289..1e9a4c986921 100644
--- a/arch/parisc/include/asm/processor.h
+++ b/arch/parisc/include/asm/processor.h
@@ -294,6 +294,10 @@ extern int _parisc_requires_coherency;
extern int running_on_qemu;
+extern void toc_handler(void);
+extern unsigned int toc_handler_size;
+extern unsigned int toc_handler_csum;
+
#endif /* __ASSEMBLY__ */
#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/arch/parisc/include/uapi/asm/pdc.h b/arch/parisc/include/uapi/asm/pdc.h
index ad51df8ba952..acc633c15722 100644
--- a/arch/parisc/include/uapi/asm/pdc.h
+++ b/arch/parisc/include/uapi/asm/pdc.h
@@ -398,8 +398,10 @@ struct zeropage {
/* int (*vec_rendz)(void); */
unsigned int vec_rendz;
int vec_pow_fail_flen;
- int vec_pad[10];
-
+ int vec_pad0[3];
+ unsigned int vec_toc_hi;
+ int vec_pad1[6];
+
/* [0x040] reserved processor dependent */
int pad0[112];
diff --git a/arch/parisc/kernel/Makefile b/arch/parisc/kernel/Makefile
index 068d90950d93..ed0b87908d71 100644
--- a/arch/parisc/kernel/Makefile
+++ b/arch/parisc/kernel/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_KPROBES) += kprobes.o
obj-$(CONFIG_KEXEC_CORE) += kexec.o relocate_kernel.o
obj-$(CONFIG_KEXEC_FILE) += kexec_file.o
+obj-$(CONFIG_TOC) += toc.o toc_asm.o
diff --git a/arch/parisc/kernel/toc.c b/arch/parisc/kernel/toc.c
new file mode 100644
index 000000000000..18327611cf8f
--- /dev/null
+++ b/arch/parisc/kernel/toc.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/kernel.h>
+#include <linux/kgdb.h>
+#include <linux/printk.h>
+#include <linux/sched/debug.h>
+#include <linux/delay.h>
+#include <linux/reboot.h>
+
+#include <asm/pdc.h>
+#include <asm/pdc_chassis.h>
+
+unsigned int __aligned(16) toc_lock = 1;
+
+static void toc20_to_pt_regs(struct pt_regs *regs, struct pdc_toc_pim_20 *toc)
+{
+ int i;
+
+ regs->gr[0] = (unsigned long)toc->cr[22];
+
+ for (i = 1; i < 32; i++)
+ regs->gr[i] = (unsigned long)toc->gr[i];
+
+ for (i = 0; i < 8; i++)
+ regs->sr[i] = (unsigned long)toc->sr[i];
+
+ regs->iasq[0] = (unsigned long)toc->cr[17];
+ regs->iasq[1] = (unsigned long)toc->iasq_back;
+ regs->iaoq[0] = (unsigned long)toc->cr[18];
+ regs->iaoq[1] = (unsigned long)toc->iaoq_back;
+
+ regs->sar = (unsigned long)toc->cr[11];
+ regs->iir = (unsigned long)toc->cr[19];
+ regs->isr = (unsigned long)toc->cr[20];
+ regs->ior = (unsigned long)toc->cr[21];
+}
+
+static void toc11_to_pt_regs(struct pt_regs *regs, struct pdc_toc_pim_11 *toc)
+{
+ int i;
+
+ regs->gr[0] = toc->cr[22];
+
+ for (i = 1; i < 32; i++)
+ regs->gr[i] = toc->gr[i];
+
+ for (i = 0; i < 8; i++)
+ regs->sr[i] = toc->sr[i];
+
+ regs->iasq[0] = toc->cr[17];
+ regs->iasq[1] = toc->iasq_back;
+ regs->iaoq[0] = toc->cr[18];
+ regs->iaoq[1] = toc->iaoq_back;
+
+ regs->sar = toc->cr[11];
+ regs->iir = toc->cr[19];
+ regs->isr = toc->cr[20];
+ regs->ior = toc->cr[21];
+}
+
+void notrace __noreturn __cold toc_intr(struct pt_regs *regs)
+{
+ struct pdc_toc_pim_20 pim_data20;
+ struct pdc_toc_pim_11 pim_data11;
+
+ nmi_enter();
+
+ if (boot_cpu_data.cpu_type >= pcxu) {
+ if (pdc_pim_toc20(&pim_data20))
+ panic("Failed to get PIM data");
+ toc20_to_pt_regs(regs, &pim_data20);
+ } else {
+ if (pdc_pim_toc11(&pim_data11))
+ panic("Failed to get PIM data");
+ toc11_to_pt_regs(regs, &pim_data11);
+ }
+
+#ifdef CONFIG_KGDB
+ if (atomic_read(&kgdb_active) != -1)
+ kgdb_nmicallback(raw_smp_processor_id(), regs);
+ kgdb_handle_exception(9, SIGTRAP, 0, regs);
+#endif
+ show_regs(regs);
+
+ /* give other CPUs time to show their backtrace */
+ mdelay(2000);
+ machine_restart("TOC");
+
+ /* should never reach this */
+ panic("TOC");
+}
+
+static __init int setup_toc(void)
+{
+ unsigned int csum = 0;
+ unsigned long toc_code = (unsigned long)dereference_function_descriptor(toc_handler);
+ int i;
+
+ PAGE0->vec_toc = __pa(toc_code) & 0xffffffff;
+#ifdef CONFIG_64BIT
+ PAGE0->vec_toc_hi = __pa(toc_code) >> 32;
+#endif
+ PAGE0->vec_toclen = toc_handler_size;
+
+ for (i = 0; i < toc_handler_size/4; i++)
+ csum += ((u32 *)toc_code)[i];
+ toc_handler_csum = -csum;
+ pr_info("TOC handler registered\n");
+ return 0;
+}
+early_initcall(setup_toc);
diff --git a/arch/parisc/kernel/toc_asm.S b/arch/parisc/kernel/toc_asm.S
new file mode 100644
index 000000000000..e94ba8044190
--- /dev/null
+++ b/arch/parisc/kernel/toc_asm.S
@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/* TOC (Transfer of Control) handler. */
+
+ .level 1.1
+
+#include <asm/assembly.h>
+#include <asm/psw.h>
+#include <linux/threads.h>
+#include <linux/linkage.h>
+
+ .text
+ .import toc_intr,code
+ .import toc_lock,data
+ .align 16
+ENTRY_CFI(toc_handler)
+ /*
+ * synchronize CPUs and obtain offset
+ * for stack setup.
+ */
+ load32 PA(toc_lock),%r1
+0: ldcw,co 0(%r1),%r2
+ cmpib,= 0,%r2,0b
+ nop
+ addi 1,%r2,%r4
+ stw %r4,0(%r1)
+ addi -1,%r2,%r4
+
+ load32 PA(toc_stack),%sp
+ /*
+ * deposit CPU number into stack address,
+ * so every CPU will have its own stack.
+ */
+ SHLREG %r4,14,%r4
+ add %r4,%sp,%sp
+
+ /*
+ * setup pt_regs on stack and save the
+ * floating point registers. PIM_TOC doesn't
+ * save fp registers, so we're doing it here.
+ */
+ copy %sp,%arg0
+ ldo PT_SZ_ALGN(%sp), %sp
+
+ /* clear pt_regs */
+ copy %arg0,%r1
+0: cmpb,<<,n %r1,%sp,0b
+ stw,ma %r0,4(%r1)
+
+ ldo PT_FR0(%arg0),%r25
+ save_fp %r25
+
+ /* go virtual */
+ load32 PA(swapper_pg_dir),%r4
+ mtctl %r4,%cr24
+ mtctl %r4,%cr25
+
+ /* Clear sr4-sr7 */
+ mtsp %r0, %sr4
+ mtsp %r0, %sr5
+ mtsp %r0, %sr6
+ mtsp %r0, %sr7
+
+ tovirt_r1 %sp
+ tovirt_r1 %arg0
+ virt_map
+
+ loadgp
+
+#ifdef CONFIG_64BIT
+ ldo -16(%sp),%r29
+#endif
+ load32 toc_intr,%r1
+ be 0(%sr7,%r1)
+ nop
+ENDPROC_CFI(toc_handler)
+
+ /*
+ * keep this checksum here, as it is part of the toc_handler
+ * spanned by toc_handler_size (all words in toc_handler are
+ * added in PDC and the sum must equal to zero.
+ */
+SYM_DATA(toc_handler_csum, .long 0)
+SYM_DATA(toc_handler_size, .long . - toc_handler)
+
+ __PAGE_ALIGNED_BSS
+ .align 64
+SYM_DATA(toc_stack, .block 16384*NR_CPUS)
--
2.33.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 4/4] parisc: add support for TOC (transfer of control)
2021-10-14 19:49 ` [PATCH v3 4/4] parisc: add support for TOC (transfer of control) Sven Schnelle
@ 2021-10-16 16:49 ` Rolf Eike Beer
2021-10-16 16:56 ` Helge Deller
0 siblings, 1 reply; 8+ messages in thread
From: Rolf Eike Beer @ 2021-10-16 16:49 UTC (permalink / raw)
To: Helge Deller, Sven Schnelle; +Cc: linux-parisc
[-- Attachment #1: Type: text/plain, Size: 1419 bytes --]
Sven Schnelle wrote:
> diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
> index 27a8b49af11f..97a889eaffe1 100644
> --- a/arch/parisc/Kconfig
> +++ b/arch/parisc/Kconfig
> @@ -288,6 +288,20 @@ config SMP
>
> If you don't know what to do here, say N.
>
> +config TOC
> + bool "Support TOC switch"
> + default y if 64BIT || !SMP
> + help
> + Most PA-RISC machines have either a switch at the back of the
machine
> + or a command in BMC to trigger a TOC interrupt. If you say Y here
a
> + handler will be installed which will either show a backtrace on
all
> + CPUs, or enter a possible configured debugger like kgdb/kdb.
> +
> + Note that with this option enabled, the kernel will use an
additional
> 16KB + per possible CPU as a special stack for the TOC handler.
> +
> + If you don't want to debug the Kernel, so N.
so -> say?
> +void notrace __noreturn __cold toc_intr(struct pt_regs *regs)
> +{
> + struct pdc_toc_pim_20 pim_data20;
> + struct pdc_toc_pim_11 pim_data11;
> +
> + nmi_enter();
> +
> + if (boot_cpu_data.cpu_type >= pcxu) {
> + if (pdc_pim_toc20(&pim_data20))
> + panic("Failed to get PIM data");
> + toc20_to_pt_regs(regs, &pim_data20);
> + } else {
> + if (pdc_pim_toc11(&pim_data11))
> + panic("Failed to get PIM data");
> + toc11_to_pt_regs(regs, &pim_data11);
> + }
As I said elsewhere because I had missed v3: move the variables in the if
branches.
Eike
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^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v3 4/4] parisc: add support for TOC (transfer of control)
2021-10-16 16:49 ` Rolf Eike Beer
@ 2021-10-16 16:56 ` Helge Deller
0 siblings, 0 replies; 8+ messages in thread
From: Helge Deller @ 2021-10-16 16:56 UTC (permalink / raw)
To: Rolf Eike Beer, Sven Schnelle; +Cc: linux-parisc
On 10/16/21 18:49, Rolf Eike Beer wrote:
> Sven Schnelle wrote:
>
>> diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
>> index 27a8b49af11f..97a889eaffe1 100644
>> --- a/arch/parisc/Kconfig
>> +++ b/arch/parisc/Kconfig
>> @@ -288,6 +288,20 @@ config SMP
>>
>> If you don't know what to do here, say N.
>>
>> +config TOC
>> + bool "Support TOC switch"
>> + default y if 64BIT || !SMP
>> + help
>> + Most PA-RISC machines have either a switch at the back of the
> machine
>> + or a command in BMC to trigger a TOC interrupt. If you say Y here
> a
>> + handler will be installed which will either show a backtrace on
> all
>> + CPUs, or enter a possible configured debugger like kgdb/kdb.
>> +
>> + Note that with this option enabled, the kernel will use an
> additional
>> 16KB + per possible CPU as a special stack for the TOC handler.
>> +
>> + If you don't want to debug the Kernel, so N.
>
> so -> say?
Yes, I fixed that before I applied to my tree.
>> +void notrace __noreturn __cold toc_intr(struct pt_regs *regs)
>> +{
>> + struct pdc_toc_pim_20 pim_data20;
>> + struct pdc_toc_pim_11 pim_data11;
>> +
>> + nmi_enter();
>> +
>> + if (boot_cpu_data.cpu_type >= pcxu) {
>> + if (pdc_pim_toc20(&pim_data20))
>> + panic("Failed to get PIM data");
>> + toc20_to_pt_regs(regs, &pim_data20);
>> + } else {
>> + if (pdc_pim_toc11(&pim_data11))
>> + panic("Failed to get PIM data");
>> + toc11_to_pt_regs(regs, &pim_data11);
>> + }
>
> As I said elsewhere because I had missed v3: move the variables in the if
> branches.
It won't change anything, the compiler is clever enough to optimize it.
Another option would be to completely move the pdc_pim_toc* functions
into the toc*_to_pt_regs functions, maybe then renaming them to
get_tocXX_pt_regs(regs);
Helge
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 0/4] add TOC support
2021-10-14 19:49 [PATCH v3 0/4] add TOC support Sven Schnelle
` (3 preceding siblings ...)
2021-10-14 19:49 ` [PATCH v3 4/4] parisc: add support for TOC (transfer of control) Sven Schnelle
@ 2021-10-14 20:27 ` Helge Deller
4 siblings, 0 replies; 8+ messages in thread
From: Helge Deller @ 2021-10-14 20:27 UTC (permalink / raw)
To: Sven Schnelle; +Cc: linux-parisc
On 10/14/21 21:49, Sven Schnelle wrote:
> This adds support for the TOC switches found on most PA-RISC
> machines. I tested this on my c8000 and a HP 16702A, which is
> basically a B160L with some logic analyzer hardware.
>
> Changes in v3:
> - add config option
> - move toc code to its own c & .S file
> - use early_initcall for setup
> - split out struct declarations
> - use sizeof(*ret) instead of sizeof(struct x)
> - move virt_map to assembly.h so it can be used from other files
>
> Changes in v2:
> - fix stack allocation
> - align toc_lock on 16 byte boundary
> - move toc_lock declaration to processor.c
>
> Sven Schnelle (4):
> parisc: move virt_map macro to assembly.h
> parisc: add PIM TOC data structures
> parisc/firmware: add functions to retrieve TOC data
> parisc: add support for TOC (transfer of control)
>
> arch/parisc/Kconfig | 14 ++++
> arch/parisc/include/asm/assembly.h | 25 +++++++
> arch/parisc/include/asm/pdc.h | 2 +
> arch/parisc/include/asm/processor.h | 4 +
> arch/parisc/include/uapi/asm/pdc.h | 28 ++++++-
> arch/parisc/kernel/Makefile | 1 +
> arch/parisc/kernel/entry.S | 24 ------
> arch/parisc/kernel/firmware.c | 32 ++++++++
> arch/parisc/kernel/toc.c | 111 ++++++++++++++++++++++++++++
> arch/parisc/kernel/toc_asm.S | 88 ++++++++++++++++++++++
> 10 files changed, 303 insertions(+), 26 deletions(-)
> create mode 100644 arch/parisc/kernel/toc.c
> create mode 100644 arch/parisc/kernel/toc_asm.S
I've just merged into the for-next-v5.15 git tree.
Thanks!
Helge
^ permalink raw reply [flat|nested] 8+ messages in thread