From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: <daniel.vetter@ffwll.ch>, <daniele.ceraolospurio@intel.com>,
<john.c.harrison@intel.com>
Subject: [Intel-gfx] [PATCH 0/2] Delay disabling scheduling on a context
Date: Thu, 21 Oct 2021 19:35:36 -0700 [thread overview]
Message-ID: <20211022023538.20908-1-matthew.brost@intel.com> (raw)
Add delay before disabling scheduling on a context. 2nd patch should
explain it quite well.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Matthew Brost (2):
drm/i915/selftests: Use correct selfest calls for live tests
drm/i915/guc: Add delay to disable scheduling after pin count goes to
zero
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../i915/gem/selftests/i915_gem_coherency.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_mman.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_object.c | 2 +-
drivers/gpu/drm/i915/gt/intel_context.h | 9 ++
drivers/gpu/drm/i915/gt/intel_context_types.h | 7 +
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 10 ++
.../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 28 ++++
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 127 ++++++++++++++----
drivers/gpu/drm/i915/i915_selftest.h | 2 +
drivers/gpu/drm/i915/i915_trace.h | 10 ++
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_perf.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +-
16 files changed, 178 insertions(+), 33 deletions(-)
--
2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: <daniel.vetter@ffwll.ch>, <daniele.ceraolospurio@intel.com>,
<john.c.harrison@intel.com>
Subject: [PATCH 0/2] Delay disabling scheduling on a context
Date: Thu, 21 Oct 2021 19:35:36 -0700 [thread overview]
Message-ID: <20211022023538.20908-1-matthew.brost@intel.com> (raw)
Add delay before disabling scheduling on a context. 2nd patch should
explain it quite well.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Matthew Brost (2):
drm/i915/selftests: Use correct selfest calls for live tests
drm/i915/guc: Add delay to disable scheduling after pin count goes to
zero
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../i915/gem/selftests/i915_gem_coherency.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_dmabuf.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_mman.c | 2 +-
.../drm/i915/gem/selftests/i915_gem_object.c | 2 +-
drivers/gpu/drm/i915/gt/intel_context.h | 9 ++
drivers/gpu/drm/i915/gt/intel_context_types.h | 7 +
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 10 ++
.../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 28 ++++
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 127 ++++++++++++++----
drivers/gpu/drm/i915/i915_selftest.h | 2 +
drivers/gpu/drm/i915/i915_trace.h | 10 ++
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_perf.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_vma.c | 2 +-
16 files changed, 178 insertions(+), 33 deletions(-)
--
2.32.0
next reply other threads:[~2021-10-22 2:40 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-22 2:35 Matthew Brost [this message]
2021-10-22 2:35 ` [PATCH 0/2] Delay disabling scheduling on a context Matthew Brost
2021-10-22 2:35 ` [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Use correct selfest calls for live tests Matthew Brost
2021-10-22 2:35 ` Matthew Brost
2021-10-22 2:35 ` [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add delay to disable scheduling after pin count goes to zero Matthew Brost
2021-10-22 2:35 ` Matthew Brost
2021-10-22 4:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Delay disabling scheduling on a context Patchwork
2021-10-22 8:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-08-17 2:05 [Intel-gfx] [PATCH 0/2] " Alan Previn
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