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From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>
Cc: "Marek Behún" <marek.behun@nic.cz>, u-boot@lists.denx.de
Subject: [PATCH 1/8] pci: pci_mvebu: Fix write_config() with PCI_SIZE_8 or PCI_SIZE_16
Date: Fri, 22 Oct 2021 16:22:08 +0200	[thread overview]
Message-ID: <20211022142215.26484-2-pali@kernel.org> (raw)
In-Reply-To: <20211022142215.26484-1-pali@kernel.org>

Current implementation of write_config() is broken for PCI_SIZE_8 or
PCI_SIZE_16 as it always uses writel(), which means that write operation
is always 32-bit, so upper 24 bits for PCI_SIZE_8 and upper 16 bits for
PCI_SIZE_16 are cleared.

Fix this by using writeb() and writew(), respectively.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
---
 drivers/pci/pci_mvebu.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 0c1d7cd770f1..8175511514ab 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -211,8 +211,19 @@ static int mvebu_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
 	writel(PCIE_CONF_ADDR(bdf, offset), pcie->base + PCIE_CONF_ADDR_OFF);
 
 	/* write data */
-	data = pci_conv_size_to_32(0, value, offset, size);
-	writel(data, pcie->base + PCIE_CONF_DATA_OFF);
+	switch (size) {
+	case PCI_SIZE_8:
+		writeb(value, pcie->base + PCIE_CONF_DATA_OFF + (offset & 3));
+		break;
+	case PCI_SIZE_16:
+		writew(value, pcie->base + PCIE_CONF_DATA_OFF + (offset & 2));
+		break;
+	case PCI_SIZE_32:
+		writel(value, pcie->base + PCIE_CONF_DATA_OFF);
+		break;
+	default:
+		return -EINVAL;
+	}
 
 	return 0;
 }
-- 
2.20.1


  reply	other threads:[~2021-10-22 14:23 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-22 14:22 [PATCH 0/8] pci: pci_mvebu: Fix access to config space and PCIe Root Port Pali Rohár
2021-10-22 14:22 ` Pali Rohár [this message]
2021-11-02 10:44   ` [PATCH 1/8] pci: pci_mvebu: Fix write_config() with PCI_SIZE_8 or PCI_SIZE_16 Stefan Roese
2021-10-22 14:22 ` [PATCH 2/8] pci: pci_mvebu: Fix read_config() " Pali Rohár
2021-11-02 10:45   ` Stefan Roese
2021-10-22 14:22 ` [PATCH 3/8] pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port) Pali Rohár
2021-11-02 10:47   ` Stefan Roese
2021-10-22 14:22 ` [PATCH 4/8] pci: pci_mvebu: Remove unused functions Pali Rohár
2021-11-02 10:47   ` Stefan Roese
2021-10-22 14:22 ` [PATCH 5/8] pci: pci_mvebu: Fix place of link up detection Pali Rohár
2021-11-02 10:50   ` Stefan Roese
2021-10-22 14:22 ` [PATCH 6/8] pci: pci_mvebu: Do not automatically enable bus mastering on PCI Bridge Pali Rohár
2021-11-02 10:50   ` Stefan Roese
2021-10-22 14:22 ` [PATCH 7/8] pci: pci_mvebu: Setup PCI controller to Root Complex mode Pali Rohár
2021-11-02 10:50   ` Stefan Roese
2021-10-22 14:22 ` [PATCH 8/8] pci: pci_mvebu: Fix comment about driver class name Pali Rohár
2021-11-02 10:50   ` Stefan Roese
2021-11-03  7:46 ` [PATCH 0/8] pci: pci_mvebu: Fix access to config space and PCIe Root Port Stefan Roese

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