From: Marc Zyngier <maz@kernel.org>
To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: Mark Kettenis <kettenis@openbsd.org>,
Sven Peter <sven@svenpeter.dev>, Hector Martin <marcan@marcan.st>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
kernel-team@android.com
Subject: [PATCH 4/5] arm64: dts: apple: t8103: Add root port interrupt routing
Date: Mon, 25 Oct 2021 22:10:17 +0100 [thread overview]
Message-ID: <20211025211018.744363-5-maz@kernel.org> (raw)
In-Reply-To: <20211025211018.744363-1-maz@kernel.org>
Add the interrupt-map properties that are required for INTx
signalling.
Tested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/boot/dts/apple/t8103.dtsi | 33 +++++++++++++++++++++++++---
1 file changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index ded82a734d11..fc8b2bb06ffe 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -278,7 +278,7 @@ pcie0: pcie@690000000 {
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
- pci@0,0 {
+ port00: pci@0,0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 152 0>;
@@ -287,9 +287,18 @@ pci@0,0 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
+ <0 0 0 2 &port00 0 0 0 1>,
+ <0 0 0 3 &port00 0 0 0 2>,
+ <0 0 0 4 &port00 0 0 0 3>;
};
- pci@1,0 {
+ port01: pci@1,0 {
device_type = "pci";
reg = <0x800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 153 0>;
@@ -298,9 +307,18 @@ pci@1,0 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
+ <0 0 0 2 &port01 0 0 0 1>,
+ <0 0 0 3 &port01 0 0 0 2>,
+ <0 0 0 4 &port01 0 0 0 3>;
};
- pci@2,0 {
+ port02: pci@2,0 {
device_type = "pci";
reg = <0x1000 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 33 0>;
@@ -309,6 +327,15 @@ pci@2,0 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
+ <0 0 0 2 &port02 0 0 0 1>,
+ <0 0 0 3 &port02 0 0 0 2>,
+ <0 0 0 4 &port02 0 0 0 3>;
};
};
};
--
2.30.2
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WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: Mark Kettenis <kettenis@openbsd.org>,
Sven Peter <sven@svenpeter.dev>, Hector Martin <marcan@marcan.st>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
kernel-team@android.com
Subject: [PATCH 4/5] arm64: dts: apple: t8103: Add root port interrupt routing
Date: Mon, 25 Oct 2021 22:10:17 +0100 [thread overview]
Message-ID: <20211025211018.744363-5-maz@kernel.org> (raw)
In-Reply-To: <20211025211018.744363-1-maz@kernel.org>
Add the interrupt-map properties that are required for INTx
signalling.
Tested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/boot/dts/apple/t8103.dtsi | 33 +++++++++++++++++++++++++---
1 file changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index ded82a734d11..fc8b2bb06ffe 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -278,7 +278,7 @@ pcie0: pcie@690000000 {
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
- pci@0,0 {
+ port00: pci@0,0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 152 0>;
@@ -287,9 +287,18 @@ pci@0,0 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
+ <0 0 0 2 &port00 0 0 0 1>,
+ <0 0 0 3 &port00 0 0 0 2>,
+ <0 0 0 4 &port00 0 0 0 3>;
};
- pci@1,0 {
+ port01: pci@1,0 {
device_type = "pci";
reg = <0x800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 153 0>;
@@ -298,9 +307,18 @@ pci@1,0 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
+ <0 0 0 2 &port01 0 0 0 1>,
+ <0 0 0 3 &port01 0 0 0 2>,
+ <0 0 0 4 &port01 0 0 0 3>;
};
- pci@2,0 {
+ port02: pci@2,0 {
device_type = "pci";
reg = <0x1000 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 33 0>;
@@ -309,6 +327,15 @@ pci@2,0 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
+ <0 0 0 2 &port02 0 0 0 1>,
+ <0 0 0 3 &port02 0 0 0 2>,
+ <0 0 0 4 &port02 0 0 0 3>;
};
};
};
--
2.30.2
next prev parent reply other threads:[~2021-10-25 21:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-25 21:10 [PATCH 0/5] arm64: apple: DT updates for M1 PCIe support Marc Zyngier
2021-10-25 21:10 ` Marc Zyngier
2021-10-25 21:10 ` [PATCH 1/5] arm64: apple: Add pinctrl nodes Marc Zyngier
2021-10-25 21:10 ` Marc Zyngier
2021-10-25 21:10 ` [PATCH 2/5] arm64: apple: Add PCIe node Marc Zyngier
2021-10-25 21:10 ` Marc Zyngier
2021-10-25 21:10 ` [PATCH 3/5] arm64: dts: apple: t8103: Add PCIe DARTs Marc Zyngier
2021-10-25 21:10 ` Marc Zyngier
2021-10-25 21:10 ` Marc Zyngier [this message]
2021-10-25 21:10 ` [PATCH 4/5] arm64: dts: apple: t8103: Add root port interrupt routing Marc Zyngier
2021-10-25 21:10 ` [PATCH 5/5] arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address Marc Zyngier
2021-10-25 21:10 ` Marc Zyngier
2021-10-25 21:45 ` Alyssa Rosenzweig
2021-10-25 21:45 ` Alyssa Rosenzweig
2021-10-27 2:10 ` [PATCH 0/5] arm64: apple: DT updates for M1 PCIe support Hector Martin
2021-10-27 2:10 ` Hector Martin
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