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From: Marc Zyngier <maz@kernel.org>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org
Cc: "Pali Rohár" <pali@kernel.org>,
	"Alyssa Rosenzweig" <alyssa@rosenzweig.io>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Mark Kettenis" <mark.kettenis@xs4all.nl>,
	"Luca Ceresoli" <luca@lucaceresoli.net>,
	kernel-team@android.com
Subject: [PATCH v3 2/3] arm64: dts: apple: t8103: Fix PCIe #PERST polarity
Date: Tue, 23 Nov 2021 18:06:35 +0000	[thread overview]
Message-ID: <20211123180636.80558-3-maz@kernel.org> (raw)
In-Reply-To: <20211123180636.80558-1-maz@kernel.org>

As the name indicates, #PERST is active low. So fix the DT description
to match the HW behaviour.

Fixes: ff2a8d91d80c ("arm64: apple: Add PCIe node")
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/boot/dts/apple/t8103.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index fc8b2bb06ffe..e22c9433d5e0 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -7,6 +7,7 @@
  * Copyright The Asahi Linux Contributors
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/apple-aic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/apple.h>
@@ -281,7 +282,7 @@ pcie0: pcie@690000000 {
 			port00: pci@0,0 {
 				device_type = "pci";
 				reg = <0x0 0x0 0x0 0x0 0x0>;
-				reset-gpios = <&pinctrl_ap 152 0>;
+				reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
 				max-link-speed = <2>;
 
 				#address-cells = <3>;
@@ -301,7 +302,7 @@ port00: pci@0,0 {
 			port01: pci@1,0 {
 				device_type = "pci";
 				reg = <0x800 0x0 0x0 0x0 0x0>;
-				reset-gpios = <&pinctrl_ap 153 0>;
+				reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
 				max-link-speed = <2>;
 
 				#address-cells = <3>;
@@ -321,7 +322,7 @@ port01: pci@1,0 {
 			port02: pci@2,0 {
 				device_type = "pci";
 				reg = <0x1000 0x0 0x0 0x0 0x0>;
-				reset-gpios = <&pinctrl_ap 33 0>;
+				reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
 				max-link-speed = <1>;
 
 				#address-cells = <3>;
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org
Cc: "Pali Rohár" <pali@kernel.org>,
	"Alyssa Rosenzweig" <alyssa@rosenzweig.io>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Mark Kettenis" <mark.kettenis@xs4all.nl>,
	"Luca Ceresoli" <luca@lucaceresoli.net>,
	kernel-team@android.com
Subject: [PATCH v3 2/3] arm64: dts: apple: t8103: Fix PCIe #PERST polarity
Date: Tue, 23 Nov 2021 18:06:35 +0000	[thread overview]
Message-ID: <20211123180636.80558-3-maz@kernel.org> (raw)
In-Reply-To: <20211123180636.80558-1-maz@kernel.org>

As the name indicates, #PERST is active low. So fix the DT description
to match the HW behaviour.

Fixes: ff2a8d91d80c ("arm64: apple: Add PCIe node")
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/boot/dts/apple/t8103.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index fc8b2bb06ffe..e22c9433d5e0 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -7,6 +7,7 @@
  * Copyright The Asahi Linux Contributors
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/apple-aic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/apple.h>
@@ -281,7 +282,7 @@ pcie0: pcie@690000000 {
 			port00: pci@0,0 {
 				device_type = "pci";
 				reg = <0x0 0x0 0x0 0x0 0x0>;
-				reset-gpios = <&pinctrl_ap 152 0>;
+				reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
 				max-link-speed = <2>;
 
 				#address-cells = <3>;
@@ -301,7 +302,7 @@ port00: pci@0,0 {
 			port01: pci@1,0 {
 				device_type = "pci";
 				reg = <0x800 0x0 0x0 0x0 0x0>;
-				reset-gpios = <&pinctrl_ap 153 0>;
+				reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
 				max-link-speed = <2>;
 
 				#address-cells = <3>;
@@ -321,7 +322,7 @@ port01: pci@1,0 {
 			port02: pci@2,0 {
 				device_type = "pci";
 				reg = <0x1000 0x0 0x0 0x0 0x0>;
-				reset-gpios = <&pinctrl_ap 33 0>;
+				reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
 				max-link-speed = <1>;
 
 				#address-cells = <3>;
-- 
2.30.2


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  parent reply	other threads:[~2021-11-23 18:06 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-23 18:06 [PATCH v3 0/3] PCI: apple: Assorted #PERST fixes Marc Zyngier
2021-11-23 18:06 ` Marc Zyngier
2021-11-23 18:06 ` [PATCH v3 1/3] PCI: apple: Follow the PCIe specifications when resetting the port Marc Zyngier
2021-11-23 18:06   ` Marc Zyngier
2021-11-24  9:22   ` Luca Ceresoli
2021-11-24  9:22     ` Luca Ceresoli
2021-11-24 12:56   ` Robin Murphy
2021-11-24 12:56     ` Robin Murphy
2021-12-07 16:22   ` Bjorn Helgaas
2021-12-07 16:22     ` Bjorn Helgaas
2021-11-23 18:06 ` Marc Zyngier [this message]
2021-11-23 18:06   ` [PATCH v3 2/3] arm64: dts: apple: t8103: Fix PCIe #PERST polarity Marc Zyngier
2021-11-23 18:16   ` Mark Kettenis
2021-11-23 18:16     ` Mark Kettenis
2021-11-24  9:17   ` Luca Ceresoli
2021-11-24  9:17     ` Luca Ceresoli
2021-12-01 14:46     ` Arnd Bergmann
2021-12-01 14:46       ` Arnd Bergmann
2021-11-23 18:06 ` [PATCH v3 3/3] PCI: apple: Fix " Marc Zyngier
2021-11-23 18:06   ` Marc Zyngier
2021-11-23 21:36   ` Luca Ceresoli
2021-11-23 21:36     ` Luca Ceresoli
2021-11-24  9:02     ` Marc Zyngier
2021-11-24  9:02       ` Marc Zyngier
2021-11-24  9:16       ` Luca Ceresoli
2021-11-24  9:16         ` Luca Ceresoli
2021-11-30 11:56 ` [PATCH v3 0/3] PCI: apple: Assorted #PERST fixes Lorenzo Pieralisi
2021-11-30 11:56   ` Lorenzo Pieralisi
2021-11-30 11:59   ` Marc Zyngier
2021-11-30 11:59     ` Marc Zyngier
2021-11-30 12:12     ` Lorenzo Pieralisi
2021-11-30 12:12       ` Lorenzo Pieralisi
2021-11-30 12:45       ` Marc Zyngier
2021-11-30 12:45         ` Marc Zyngier
2021-12-01 14:48         ` Arnd Bergmann
2021-12-01 14:48           ` Arnd Bergmann
2021-12-07 10:16   ` Lorenzo Pieralisi
2021-12-07 10:16     ` Lorenzo Pieralisi
2021-12-07 20:30     ` Bjorn Helgaas
2021-12-07 20:30       ` Bjorn Helgaas

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