From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>, Simon Glass <sjg@chromium.org>,
Bin Meng <bmeng.cn@gmail.com>,
Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
Subject: [PATCH u-boot-next 02/12] pci: gt64120: Use PCI_CONF1_ADDRESS() macro
Date: Fri, 26 Nov 2021 11:42:42 +0100 [thread overview]
Message-ID: <20211126104252.5443-3-pali@kernel.org> (raw)
In-Reply-To: <20211126104252.5443-1-pali@kernel.org>
PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.
So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
drivers/pci/pci_gt64120.c | 7 ++-----
include/gt64120.h | 12 ------------
2 files changed, 2 insertions(+), 17 deletions(-)
diff --git a/drivers/pci/pci_gt64120.c b/drivers/pci/pci_gt64120.c
index 153c65b119a4..2c2a80eeaa06 100644
--- a/drivers/pci/pci_gt64120.c
+++ b/drivers/pci/pci_gt64120.c
@@ -48,7 +48,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
{
unsigned int bus = PCI_BUS(bdf);
unsigned int dev = PCI_DEV(bdf);
- unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf);
+ unsigned int func = PCI_FUNC(bdf);
u32 intr;
u32 addr;
u32 val;
@@ -65,10 +65,7 @@ static int gt_config_access(struct gt64120_pci_controller *gt,
/* Clear cause register bits */
writel(~GT_INTRCAUSE_ABORT_BITS, >->regs->intrcause);
- addr = GT_PCI0_CFGADDR_CONFIGEN_BIT;
- addr |= bus << GT_PCI0_CFGADDR_BUSNUM_SHF;
- addr |= devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF;
- addr |= (where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF;
+ addr = PCI_CONF1_ADDRESS(bus, dev, func, where);
/* Setup address */
writel(addr, >->regs->pci0_cfgaddr);
diff --git a/include/gt64120.h b/include/gt64120.h
index 0b577f3f44b9..b58afe3c4afe 100644
--- a/include/gt64120.h
+++ b/include/gt64120.h
@@ -491,18 +491,6 @@
#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK
-#define GT_PCI0_CFGADDR_REGNUM_SHF 2
-#define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF)
-#define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8
-#define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF)
-#define GT_PCI0_CFGADDR_DEVNUM_SHF 11
-#define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF)
-#define GT_PCI0_CFGADDR_BUSNUM_SHF 16
-#define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_SHF 31
-#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
-#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK
-
#define GT_PCI0_CMD_MBYTESWAP_SHF 0
#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK
--
2.20.1
next prev parent reply other threads:[~2021-11-26 10:44 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 10:42 [PATCH u-boot-next 00/12] Common U-Boot macros for PCI Configuration Mechanism #1 Pali Rohár
2021-11-26 10:42 ` [PATCH u-boot-next 01/12] pci: Add standard PCI Config Address macros Pali Rohár
2021-12-28 8:32 ` Simon Glass
2021-12-28 13:34 ` Pali Rohár
2022-01-13 1:51 ` Tom Rini
2021-11-26 10:42 ` Pali Rohár [this message]
2021-12-28 8:32 ` [PATCH u-boot-next 02/12] pci: gt64120: Use PCI_CONF1_ADDRESS() macro Simon Glass
2022-01-13 1:51 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 03/12] pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macro Pali Rohár
2021-12-28 8:32 ` Simon Glass
2021-12-28 13:47 ` Pali Rohár
2022-01-13 1:51 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 04/12] pci: msc01: Use PCI_CONF1_ADDRESS() macro Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:51 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 05/12] pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macro Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:51 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 06/12] pci: tegra: " Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:51 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 07/12] pci: fsl: " Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:52 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 08/12] pci: mediatek: " Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:52 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 09/12] pci: sh7780: Use PCI_CONF1_ADDRESS() macro Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:52 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 10/12] x86: pci: " Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:52 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 11/12] m68k: mcf5445x: " Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:52 ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 12/12] pci: sh7751: Fix access to config space via " Pali Rohár
2021-12-28 8:32 ` Simon Glass
2022-01-13 1:52 ` Tom Rini
2021-12-17 17:35 ` [PATCH u-boot-next 00/12] Common U-Boot macros for PCI Configuration Mechanism #1 Pali Rohár
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