All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>, Simon Glass <sjg@chromium.org>,
	Bin Meng <bmeng.cn@gmail.com>,
	Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
Subject: [PATCH u-boot-next 04/12] pci: msc01: Use PCI_CONF1_ADDRESS() macro
Date: Fri, 26 Nov 2021 11:42:44 +0100	[thread overview]
Message-ID: <20211126104252.5443-5-pali@kernel.org> (raw)
In-Reply-To: <20211126104252.5443-1-pali@kernel.org>

PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pci/pci_msc01.c | 7 ++-----
 include/msc01.h         | 9 ---------
 2 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index 2f1b688fc321..8d363d60498b 100644
--- a/drivers/pci/pci_msc01.c
+++ b/drivers/pci/pci_msc01.c
@@ -34,16 +34,13 @@ static int msc01_config_access(struct msc01_pci_controller *msc01,
 	void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS;
 	unsigned int bus = PCI_BUS(bdf);
 	unsigned int dev = PCI_DEV(bdf);
-	unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf);
+	unsigned int func = PCI_FUNC(bdf);
 
 	/* clear abort status */
 	__raw_writel(aborts, intstat);
 
 	/* setup address */
-	__raw_writel((bus << MSC01_PCI_CFGADDR_BNUM_SHF) |
-		     (dev << MSC01_PCI_CFGADDR_DNUM_SHF) |
-		     (devfn << MSC01_PCI_CFGADDR_FNUM_SHF) |
-		     ((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF),
+	__raw_writel((PCI_CONF1_ADDRESS(bus, dev, func, where) & ~PCI_CONF1_ENABLE),
 		     msc01->base + MSC01_PCI_CFGADDR_OFS);
 
 	/* perform access */
diff --git a/include/msc01.h b/include/msc01.h
index ec18a724eb93..20158123494a 100644
--- a/include/msc01.h
+++ b/include/msc01.h
@@ -71,15 +71,6 @@
 #define MSC01_PCI_INTSTAT_MA_SHF	7
 #define MSC01_PCI_INTSTAT_MA_MSK	(0x1 << MSC01_PCI_INTSTAT_MA_SHF)
 
-#define MSC01_PCI_CFGADDR_BNUM_SHF	16
-#define MSC01_PCI_CFGADDR_BNUM_MSK	(0xff << MSC01_PCI_CFGADDR_BNUM_SHF)
-#define MSC01_PCI_CFGADDR_DNUM_SHF	11
-#define MSC01_PCI_CFGADDR_DNUM_MSK	(0x1f << MSC01_PCI_CFGADDR_DNUM_SHF)
-#define MSC01_PCI_CFGADDR_FNUM_SHF	8
-#define MSC01_PCI_CFGADDR_FNUM_MSK	(0x3 << MSC01_PCI_CFGADDR_FNUM_SHF)
-#define MSC01_PCI_CFGADDR_RNUM_SHF	2
-#define MSC01_PCI_CFGADDR_RNUM_MSK	(0x3f << MSC01_PCI_CFGADDR_RNUM_SHF)
-
 #define MSC01_PCI_HEAD0_VENDORID_SHF	0
 #define MSC01_PCI_HEAD0_DEVICEID_SHF	16
 
-- 
2.20.1


  parent reply	other threads:[~2021-11-26 10:44 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-26 10:42 [PATCH u-boot-next 00/12] Common U-Boot macros for PCI Configuration Mechanism #1 Pali Rohár
2021-11-26 10:42 ` [PATCH u-boot-next 01/12] pci: Add standard PCI Config Address macros Pali Rohár
2021-12-28  8:32   ` Simon Glass
2021-12-28 13:34     ` Pali Rohár
2022-01-13  1:51   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 02/12] pci: gt64120: Use PCI_CONF1_ADDRESS() macro Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:51   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 03/12] pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macro Pali Rohár
2021-12-28  8:32   ` Simon Glass
2021-12-28 13:47     ` Pali Rohár
2022-01-13  1:51   ` Tom Rini
2021-11-26 10:42 ` Pali Rohár [this message]
2021-12-28  8:32   ` [PATCH u-boot-next 04/12] pci: msc01: Use PCI_CONF1_ADDRESS() macro Simon Glass
2022-01-13  1:51   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 05/12] pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macro Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:51   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 06/12] pci: tegra: " Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:51   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 07/12] pci: fsl: " Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:52   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 08/12] pci: mediatek: " Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:52   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 09/12] pci: sh7780: Use PCI_CONF1_ADDRESS() macro Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:52   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 10/12] x86: pci: " Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:52   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 11/12] m68k: mcf5445x: " Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:52   ` Tom Rini
2021-11-26 10:42 ` [PATCH u-boot-next 12/12] pci: sh7751: Fix access to config space via " Pali Rohár
2021-12-28  8:32   ` Simon Glass
2022-01-13  1:52   ` Tom Rini
2021-12-17 17:35 ` [PATCH u-boot-next 00/12] Common U-Boot macros for PCI Configuration Mechanism #1 Pali Rohár

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211126104252.5443-5-pali@kernel.org \
    --to=pali@kernel.org \
    --cc=bmeng.cn@gmail.com \
    --cc=daniel.schwierzeck@gmail.com \
    --cc=sjg@chromium.org \
    --cc=sr@denx.de \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.