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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH v5 04/17] powerpc/64s: Move and rename do_bad_slb_fault as it is not hash specific
Date: Mon, 29 Nov 2021 13:07:50 +1000	[thread overview]
Message-ID: <20211129030803.1888161-5-npiggin@gmail.com> (raw)
In-Reply-To: <20211129030803.1888161-1-npiggin@gmail.com>

slb.c is hash-specific SLB management, but do_bad_slb_fault deals with
segment interrupts that occur with radix MMU as well.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/include/asm/interrupt.h |  2 +-
 arch/powerpc/kernel/exceptions-64s.S |  4 ++--
 arch/powerpc/mm/book3s64/slb.c       | 16 ----------------
 arch/powerpc/mm/fault.c              | 24 ++++++++++++++++++++++++
 4 files changed, 27 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h
index a1d238255f07..3487aab12229 100644
--- a/arch/powerpc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
@@ -564,7 +564,7 @@ DECLARE_INTERRUPT_HANDLER(kernel_bad_stack);
 
 /* slb.c */
 DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault);
-DECLARE_INTERRUPT_HANDLER(do_bad_slb_fault);
+DECLARE_INTERRUPT_HANDLER(do_bad_segment_interrupt);
 
 /* hash_utils.c */
 DECLARE_INTERRUPT_HANDLER_RAW(do_hash_fault);
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index eaf1f72131a1..046c99e31d01 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1430,7 +1430,7 @@ MMU_FTR_SECTION_ELSE
 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
 	std	r3,RESULT(r1)
 	addi	r3,r1,STACK_FRAME_OVERHEAD
-	bl	do_bad_slb_fault
+	bl	do_bad_segment_interrupt
 	b	interrupt_return_srr
 
 
@@ -1510,7 +1510,7 @@ MMU_FTR_SECTION_ELSE
 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
 	std	r3,RESULT(r1)
 	addi	r3,r1,STACK_FRAME_OVERHEAD
-	bl	do_bad_slb_fault
+	bl	do_bad_segment_interrupt
 	b	interrupt_return_srr
 
 
diff --git a/arch/powerpc/mm/book3s64/slb.c b/arch/powerpc/mm/book3s64/slb.c
index f0037bcc47a0..31f4cef3adac 100644
--- a/arch/powerpc/mm/book3s64/slb.c
+++ b/arch/powerpc/mm/book3s64/slb.c
@@ -868,19 +868,3 @@ DEFINE_INTERRUPT_HANDLER_RAW(do_slb_fault)
 		return err;
 	}
 }
-
-DEFINE_INTERRUPT_HANDLER(do_bad_slb_fault)
-{
-	int err = regs->result;
-
-	if (err == -EFAULT) {
-		if (user_mode(regs))
-			_exception(SIGSEGV, regs, SEGV_BNDERR, regs->dar);
-		else
-			bad_page_fault(regs, SIGSEGV);
-	} else if (err == -EINVAL) {
-		unrecoverable_exception(regs);
-	} else {
-		BUG();
-	}
-}
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index a8d0ce85d39a..2d4a411c7c85 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -35,6 +35,7 @@
 #include <linux/kfence.h>
 #include <linux/pkeys.h>
 
+#include <asm/asm-prototypes.h>
 #include <asm/firmware.h>
 #include <asm/interrupt.h>
 #include <asm/page.h>
@@ -620,4 +621,27 @@ DEFINE_INTERRUPT_HANDLER(do_bad_page_fault_segv)
 {
 	bad_page_fault(regs, SIGSEGV);
 }
+
+/*
+ * In radix, segment interrupts indicate the EA is not addressable by the
+ * page table geometry, so they are always sent here.
+ *
+ * In hash, this is called if do_slb_fault returns error. Typically it is
+ * because the EA was outside the region allowed by software.
+ */
+DEFINE_INTERRUPT_HANDLER(do_bad_segment_interrupt)
+{
+	int err = regs->result;
+
+	if (err == -EFAULT) {
+		if (user_mode(regs))
+			_exception(SIGSEGV, regs, SEGV_BNDERR, regs->dar);
+		else
+			bad_page_fault(regs, SIGSEGV);
+	} else if (err == -EINVAL) {
+		unrecoverable_exception(regs);
+	} else {
+		BUG();
+	}
+}
 #endif
-- 
2.23.0


  parent reply	other threads:[~2021-11-29  3:11 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-29  3:07 [PATCH v5 00/17] powerpc: Make hash MMU code build configurable Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 01/17] powerpc: Remove unused FW_FEATURE_NATIVE references Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 02/17] powerpc: Rename PPC_NATIVE to PPC_HASH_MMU_NATIVE Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 03/17] powerpc/pseries: Stop selecting PPC_HASH_MMU_NATIVE Nicholas Piggin
2021-11-29  3:07 ` Nicholas Piggin [this message]
2021-11-29  3:07 ` [PATCH v5 05/17] powerpc/pseries: move process table registration away from hash-specific code Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 06/17] powerpc/pseries: lparcfg don't include slb_size line in radix mode Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 07/17] powerpc/64s: move THP trace point creation out of hash specific file Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 08/17] powerpc/64s: Make flush_and_reload_slb a no-op when radix is enabled Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 09/17] powerpc/64s: move page size definitions from hash specific file Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 10/17] powerpc/64s: Rename hash_hugetlbpage.c to hugetlbpage.c Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 11/17] powerpc/64: pcpu setup avoid reading mmu_linear_psize on 64e or radix Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 12/17] powerpc: make memremap_compat_align 64s-only Nicholas Piggin
2021-11-29  3:07 ` [PATCH v5 13/17] powerpc/64e: remove mmu_linear_psize Nicholas Piggin
2021-11-29  3:08 ` [PATCH v5 14/17] powerpc/64s: Fix radix MMU when MMU_FTR_HPTE_TABLE is clear Nicholas Piggin
2021-11-29  3:08 ` [PATCH v5 15/17] powerpc/64s: Make hash MMU support configurable Nicholas Piggin
2021-11-29 13:46   ` Fabiano Rosas
2021-12-01  5:13     ` Nicholas Piggin
2021-11-29  3:08 ` [PATCH v5 16/17] powerpc/64s: Move hash MMU support code under CONFIG_PPC_64S_HASH_MMU Nicholas Piggin
2021-11-29  3:08 ` [PATCH v5 17/17] powerpc/microwatt: add POWER9_CPU, clear PPC_64S_HASH_MMU Nicholas Piggin

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