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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
	Sven Peter <sven@svenpeter.dev>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dougall <dougallj@gmail.com>,
	kernel-team@android.com, Rob Herring <robh@kernel.org>
Subject: [PATCH v2 2/8] dt-bindings: apple, aic: Add CPU PMU per-cpu pseudo-interrupts
Date: Wed,  1 Dec 2021 13:49:03 +0000	[thread overview]
Message-ID: <20211201134909.390490-3-maz@kernel.org> (raw)
In-Reply-To: <20211201134909.390490-1-maz@kernel.org>

Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 SoC.

We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 .../devicetree/bindings/interrupt-controller/apple,aic.yaml     | 2 ++
 include/dt-bindings/interrupt-controller/apple-aic.h            | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index cf6c091a07b1..b95e41816953 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -56,6 +56,8 @@ properties:
           - 1: virtual HV timer
           - 2: physical guest timer
           - 3: virtual guest timer
+          - 4: 'efficient' CPU PMU
+          - 5: 'performance' CPU PMU
 
       The 3rd cell contains the interrupt flags. This is normally
       IRQ_TYPE_LEVEL_HIGH (4).
diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
index 604f2bb30ac0..bf3aac0e5491 100644
--- a/include/dt-bindings/interrupt-controller/apple-aic.h
+++ b/include/dt-bindings/interrupt-controller/apple-aic.h
@@ -11,5 +11,7 @@
 #define AIC_TMR_HV_VIRT		1
 #define AIC_TMR_GUEST_PHYS	2
 #define AIC_TMR_GUEST_VIRT	3
+#define AIC_CPU_PMU_E		4
+#define AIC_CPU_PMU_P		5
 
 #endif
-- 
2.30.2


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WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
	Sven Peter <sven@svenpeter.dev>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dougall <dougallj@gmail.com>,
	kernel-team@android.com, Rob Herring <robh@kernel.org>
Subject: [PATCH v2 2/8] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts
Date: Wed,  1 Dec 2021 13:49:03 +0000	[thread overview]
Message-ID: <20211201134909.390490-3-maz@kernel.org> (raw)
In-Reply-To: <20211201134909.390490-1-maz@kernel.org>

Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 SoC.

We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 .../devicetree/bindings/interrupt-controller/apple,aic.yaml     | 2 ++
 include/dt-bindings/interrupt-controller/apple-aic.h            | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index cf6c091a07b1..b95e41816953 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -56,6 +56,8 @@ properties:
           - 1: virtual HV timer
           - 2: physical guest timer
           - 3: virtual guest timer
+          - 4: 'efficient' CPU PMU
+          - 5: 'performance' CPU PMU
 
       The 3rd cell contains the interrupt flags. This is normally
       IRQ_TYPE_LEVEL_HIGH (4).
diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
index 604f2bb30ac0..bf3aac0e5491 100644
--- a/include/dt-bindings/interrupt-controller/apple-aic.h
+++ b/include/dt-bindings/interrupt-controller/apple-aic.h
@@ -11,5 +11,7 @@
 #define AIC_TMR_HV_VIRT		1
 #define AIC_TMR_GUEST_PHYS	2
 #define AIC_TMR_GUEST_VIRT	3
+#define AIC_CPU_PMU_E		4
+#define AIC_CPU_PMU_P		5
 
 #endif
-- 
2.30.2


  parent reply	other threads:[~2021-12-01 13:51 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-01 13:49 [PATCH v2 0/8] drivers/perf: CPU PMU driver for Apple M1 Marc Zyngier
2021-12-01 13:49 ` Marc Zyngier
2021-12-01 13:49 ` [PATCH v2 1/8] dt-bindings: arm-pmu: Document Apple PMU compatible strings Marc Zyngier
2021-12-01 13:49   ` Marc Zyngier
2021-12-12  7:27   ` Hector Martin
2021-12-12  7:27     ` Hector Martin
2021-12-01 13:49 ` Marc Zyngier [this message]
2021-12-01 13:49   ` [PATCH v2 2/8] dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts Marc Zyngier
2021-12-12  7:26   ` Hector Martin
2021-12-12  7:26     ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 3/8] irqchip/apple-aic: Add cpumasks for E and P cores Marc Zyngier
2021-12-01 13:49   ` Marc Zyngier
2021-12-01 16:08   ` Mark Rutland
2021-12-01 16:08     ` Mark Rutland
2021-12-03 16:32     ` Marc Zyngier
2021-12-03 16:32       ` Marc Zyngier
2021-12-12  7:22       ` Hector Martin
2021-12-12  7:22         ` Hector Martin
2021-12-12  7:30   ` Hector Martin
2021-12-12  7:30     ` Hector Martin
2021-12-13 14:43     ` Marc Zyngier
2021-12-13 14:43       ` Marc Zyngier
2021-12-01 13:49 ` [PATCH v2 4/8] irqchip/apple-aic: Wire PMU interrupts Marc Zyngier
2021-12-01 13:49   ` Marc Zyngier
2021-12-12  7:25   ` Hector Martin
2021-12-12  7:25     ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 5/8] irqchip/apple-aic: Move PMU-specific registers to their own include file Marc Zyngier
2021-12-01 13:49   ` Marc Zyngier
2021-12-12  7:23   ` Hector Martin
2021-12-12  7:23     ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 6/8] arm64: apple: t8301: Add PMU nodes Marc Zyngier
2021-12-01 13:49   ` Marc Zyngier
2021-12-12  7:26   ` Hector Martin
2021-12-12  7:26     ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 7/8] drivers/perf: arm_pmu: Handle 47 bit counters Marc Zyngier
2021-12-01 13:49   ` Marc Zyngier
2021-12-12  7:26   ` Hector Martin
2021-12-12  7:26     ` Hector Martin
2021-12-01 13:49 ` [PATCH v2 8/8] drivers/perf: Add Apple icestorm/firestorm CPU PMU driver Marc Zyngier
2021-12-01 13:49   ` Marc Zyngier
2021-12-01 16:58   ` Mark Rutland
2021-12-01 16:58     ` Mark Rutland
2021-12-01 17:56     ` Alyssa Rosenzweig
2021-12-01 17:56       ` Alyssa Rosenzweig
2021-12-02 15:39     ` Marc Zyngier
2021-12-02 15:39       ` Marc Zyngier
2021-12-02 16:14       ` Mark Rutland
2021-12-02 16:14         ` Mark Rutland
2021-12-03 11:22         ` Marc Zyngier
2021-12-03 11:22           ` Marc Zyngier
2021-12-03 12:04           ` Mark Rutland
2021-12-03 12:04             ` Mark Rutland
2021-12-03 16:22             ` Marc Zyngier
2021-12-03 16:22               ` Marc Zyngier

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