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From: Jason Gunthorpe via iommu <iommu@lists.linux-foundation.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Allen Hubbe <allenbh@gmail.com>,
	linux-s390@vger.kernel.org, Kevin Tian <kevin.tian@intel.com>,
	x86@kernel.org, Dave Jiang <dave.jiang@intel.com>,
	Ashok Raj <ashok.raj@intel.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Marc Zygnier <maz@kernel.org>, Heiko Carstens <hca@linux.ibm.com>,
	LKML <linux-kernel@vger.kernel.org>,
	iommu@lists.linux-foundation.org,
	Christian Borntraeger <borntraeger@de.ibm.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Joerg Roedel <jroedel@suse.de>,
	Bjorn Helgaas <helgaas@kernel.org>,
	linux-pci@vger.kernel.org, linux-ntb@googlegroups.com,
	Logan Gunthorpe <logang@deltatee.com>,
	Megha Dey <megha.dey@intel.com>
Subject: Re: [patch 21/32] NTB/msi: Convert to msi_on_each_desc()
Date: Thu, 2 Dec 2021 16:00:17 -0400	[thread overview]
Message-ID: <20211202200017.GS4670@nvidia.com> (raw)
In-Reply-To: <87wnkm6c77.ffs@tglx>

On Thu, Dec 02, 2021 at 08:25:48PM +0100, Thomas Gleixner wrote:
> Jason,
> 
> On Thu, Dec 02 2021 at 09:55, Jason Gunthorpe wrote:
> > On Thu, Dec 02, 2021 at 01:01:42AM +0100, Thomas Gleixner wrote:
> >> On Wed, Dec 01 2021 at 21:21, Thomas Gleixner wrote:
> >> > On Wed, Dec 01 2021 at 14:14, Jason Gunthorpe wrote:
> >> > Which in turn is consistent all over the place and does not require any
> >> > special case for anything. Neither for interrupts nor for anything else.
> >> 
> >> that said, feel free to tell me that I'm getting it all wrong.
> >> 
> >> The reason I'm harping on this is that we are creating ABIs on several
> >> ends and we all know that getting that wrong is a major pain.
> >
> > I don't really like coupling the method to fetch IRQs with needing
> > special struct devices. Struct devices have a sysfs presence and it is
> > not always appropriate to create sysfs stuff just to allocate some
> > IRQs.
> >
> > A queue is simply not a device, it doesn't make any sense. A queue is
> > more like a socket().
> 
> Let's put the term 'device' for a bit please. 
> 
> > That said, we often have enough struct devices floating about to make
> > this work. Between netdev/ib_device/aux device/mdev we can use them to
> > do this.
> >
> > I think it is conceptual nonsense to attach an IMS IRQ domain to a
> > netdev or a cdev, but it will solve this problem.
> 
> The IMS irqdomain is _NOT_ part of the netdev or cdev or whatever. I
> explained that several times now.
> 
> We seem to have a serious problem of terminology and the understanding
> of topology which is why we continue to talk past each other forever.

I think I understand and agree with everything you said below.

The point we diverge is where to put the vector storage:
 
> Of course we can store them in pci_dev.dev.msi.data.store. Either with a
> dedicated xarray or by partitioning the xarray space. Both have their
> pro and cons.

This decision seems to drive the question of how many 'struct devices'
do we need, and where do we get them..

> But what I really struggle with is how this is further represented when
> the queues are allocated for VFIO, cdev, whatever usage.

Yes, this seems to be the primary question

> The fact that the irqdomain is instantiated by the device driver does
> not make it any different. As explained above it's just an
> implementation detail which makes it possible to handle the device
> specific message storage requirement in a sane way. The actual interrupt
> resources come still from the underlying irqdomains as for PCI/MSI.

Yes! This is not under debate

> Now I was looking for a generic representation of such a container and
> my initial reaction was to bind it to a struct device, which also makes
> it trivial to store these MSI descriptors in that struct device.

Right, I've been trying to argue around just this choice.
 
> I can understand your resistance against that to some extent, but I
> think we really have to come up with a proper abstract representation
> for these.

Ok

> Such a logical function would be the entity to hand out for VFIO or
> cdev.

What is a logical function, concretely? 

Does it have struct device?

Can I instead suggest a name like 'message interrupt table' ?

Ie a device has two linearly indexed message interrupt tables - the
PCI SIG defined MSI/MSI-X one created by the PCI core and the IMS one
created by the driver.

Both start at 0 index and they have different irq_domains.

Instead of asking the driver to create a domain we ask the driver to
create a new 'message interrupt table'. The driver provides the
irq_chip to program the messages and the pci_device. The core code
manages the irq domain setup.

Using what you say below:

> If this is not split out, then every driver and wrapper has to come up
> with it's own representation of this instead of being able to do:
> 
>      request_irq(msi_get_virq(lfunc, idx=0), handler0, ...);
>      request_irq(msi_get_virq(lfunc, idx=1), handler1, ...);

We could say:
  msi_get_virq(device.pci_msi_table, index=0)

Is the 0th PCI SIG MSI vector

Something like:

 ims_table = pci_create_msi_table(pci_dev, my_irq_chip,..)
 msi_get_virq(ims_table, index=0)

Is the 0th IMS vector

Is it close to what you are thinking with lfunc?

Regards,
Jason
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Jason Gunthorpe <jgg@nvidia.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Logan Gunthorpe <logang@deltatee.com>,
	LKML <linux-kernel@vger.kernel.org>,
	Bjorn Helgaas <helgaas@kernel.org>, Marc Zygnier <maz@kernel.org>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Megha Dey <megha.dey@intel.com>, Ashok Raj <ashok.raj@intel.com>,
	linux-pci@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jon Mason <jdmason@kudzu.us>, Dave Jiang <dave.jiang@intel.com>,
	Allen Hubbe <allenbh@gmail.com>,
	linux-ntb@googlegroups.com, linux-s390@vger.kernel.org,
	Heiko Carstens <hca@linux.ibm.com>,
	Christian Borntraeger <borntraeger@de.ibm.com>,
	x86@kernel.org, Joerg Roedel <jroedel@suse.de>,
	iommu@lists.linux-foundation.org
Subject: Re: [patch 21/32] NTB/msi: Convert to msi_on_each_desc()
Date: Thu, 2 Dec 2021 16:00:17 -0400	[thread overview]
Message-ID: <20211202200017.GS4670@nvidia.com> (raw)
In-Reply-To: <87wnkm6c77.ffs@tglx>

On Thu, Dec 02, 2021 at 08:25:48PM +0100, Thomas Gleixner wrote:
> Jason,
> 
> On Thu, Dec 02 2021 at 09:55, Jason Gunthorpe wrote:
> > On Thu, Dec 02, 2021 at 01:01:42AM +0100, Thomas Gleixner wrote:
> >> On Wed, Dec 01 2021 at 21:21, Thomas Gleixner wrote:
> >> > On Wed, Dec 01 2021 at 14:14, Jason Gunthorpe wrote:
> >> > Which in turn is consistent all over the place and does not require any
> >> > special case for anything. Neither for interrupts nor for anything else.
> >> 
> >> that said, feel free to tell me that I'm getting it all wrong.
> >> 
> >> The reason I'm harping on this is that we are creating ABIs on several
> >> ends and we all know that getting that wrong is a major pain.
> >
> > I don't really like coupling the method to fetch IRQs with needing
> > special struct devices. Struct devices have a sysfs presence and it is
> > not always appropriate to create sysfs stuff just to allocate some
> > IRQs.
> >
> > A queue is simply not a device, it doesn't make any sense. A queue is
> > more like a socket().
> 
> Let's put the term 'device' for a bit please. 
> 
> > That said, we often have enough struct devices floating about to make
> > this work. Between netdev/ib_device/aux device/mdev we can use them to
> > do this.
> >
> > I think it is conceptual nonsense to attach an IMS IRQ domain to a
> > netdev or a cdev, but it will solve this problem.
> 
> The IMS irqdomain is _NOT_ part of the netdev or cdev or whatever. I
> explained that several times now.
> 
> We seem to have a serious problem of terminology and the understanding
> of topology which is why we continue to talk past each other forever.

I think I understand and agree with everything you said below.

The point we diverge is where to put the vector storage:
 
> Of course we can store them in pci_dev.dev.msi.data.store. Either with a
> dedicated xarray or by partitioning the xarray space. Both have their
> pro and cons.

This decision seems to drive the question of how many 'struct devices'
do we need, and where do we get them..

> But what I really struggle with is how this is further represented when
> the queues are allocated for VFIO, cdev, whatever usage.

Yes, this seems to be the primary question

> The fact that the irqdomain is instantiated by the device driver does
> not make it any different. As explained above it's just an
> implementation detail which makes it possible to handle the device
> specific message storage requirement in a sane way. The actual interrupt
> resources come still from the underlying irqdomains as for PCI/MSI.

Yes! This is not under debate

> Now I was looking for a generic representation of such a container and
> my initial reaction was to bind it to a struct device, which also makes
> it trivial to store these MSI descriptors in that struct device.

Right, I've been trying to argue around just this choice.
 
> I can understand your resistance against that to some extent, but I
> think we really have to come up with a proper abstract representation
> for these.

Ok

> Such a logical function would be the entity to hand out for VFIO or
> cdev.

What is a logical function, concretely? 

Does it have struct device?

Can I instead suggest a name like 'message interrupt table' ?

Ie a device has two linearly indexed message interrupt tables - the
PCI SIG defined MSI/MSI-X one created by the PCI core and the IMS one
created by the driver.

Both start at 0 index and they have different irq_domains.

Instead of asking the driver to create a domain we ask the driver to
create a new 'message interrupt table'. The driver provides the
irq_chip to program the messages and the pci_device. The core code
manages the irq domain setup.

Using what you say below:

> If this is not split out, then every driver and wrapper has to come up
> with it's own representation of this instead of being able to do:
> 
>      request_irq(msi_get_virq(lfunc, idx=0), handler0, ...);
>      request_irq(msi_get_virq(lfunc, idx=1), handler1, ...);

We could say:
  msi_get_virq(device.pci_msi_table, index=0)

Is the 0th PCI SIG MSI vector

Something like:

 ims_table = pci_create_msi_table(pci_dev, my_irq_chip,..)
 msi_get_virq(ims_table, index=0)

Is the 0th IMS vector

Is it close to what you are thinking with lfunc?

Regards,
Jason

  reply	other threads:[~2021-12-02 20:00 UTC|newest]

Thread overview: 253+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-27  1:22 [patch 00/32] genirq/msi, PCI/MSI: Spring cleaning - Part 2 Thomas Gleixner
2021-11-27  1:23 ` Thomas Gleixner
2021-11-27  1:22 ` [patch 01/32] genirq/msi: Move descriptor list to struct msi_device_data Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27 12:19   ` Greg Kroah-Hartman
2021-11-27  1:22 ` [patch 02/32] genirq/msi: Add mutex for MSI list protection Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 03/32] genirq/msi: Provide msi_domain_alloc/free_irqs_descs_locked() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 04/32] genirq/msi: Provide a set of advanced MSI accessors and iterators Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-28  1:00   ` Jason Gunthorpe
2021-11-28 19:22     ` Thomas Gleixner
2021-11-29  9:26       ` Thomas Gleixner
2021-11-29 14:01         ` Jason Gunthorpe
2021-11-29 14:46           ` Thomas Gleixner
2021-11-27  1:22 ` [patch 05/32] genirq/msi: Provide msi_alloc_msi_desc() and a simple allocator Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 06/32] genirq/msi: Provide domain flags to allocate/free MSI descriptors automatically Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 07/32] genirq/msi: Count the allocated MSI descriptors Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27 12:19   ` Greg Kroah-Hartman
2021-11-27 19:22     ` Thomas Gleixner
2021-11-27 19:45       ` Thomas Gleixner
2021-11-28 11:07         ` Greg Kroah-Hartman
2021-11-28 19:23           ` Thomas Gleixner
2021-11-27  1:22 ` [patch 08/32] PCI/MSI: Protect MSI operations Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 09/32] PCI/MSI: Use msi_add_msi_desc() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 10/32] PCI/MSI: Let core code free MSI descriptors Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 11/32] PCI/MSI: Use msi_on_each_desc() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 12/32] x86/pci/xen: Use msi_for_each_desc() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 13/32] xen/pcifront: Rework MSI handling Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 14/32] s390/pci: Rework MSI descriptor walk Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-29 10:31   ` Niklas Schnelle
2021-11-29 13:04     ` Thomas Gleixner
2021-11-27  1:22 ` [patch 15/32] powerpc/4xx/hsta: Rework MSI handling Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 16/32] powerpc/cell/axon_msi: Convert to msi_on_each_desc() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 17/32] powerpc/pasemi/msi: Convert to msi_on_each_dec() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 18/32] powerpc/fsl_msi: Use msi_for_each_desc() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 19/32] powerpc/mpic_u3msi: Use msi_for_each-desc() Thomas Gleixner
2021-11-27  1:23   ` Thomas Gleixner
2021-11-27  1:22 ` [patch 20/32] PCI: hv: Rework MSI handling Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 21/32] NTB/msi: Convert to msi_on_each_desc() Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-29 18:21   ` Logan Gunthorpe
2021-11-29 20:51     ` Thomas Gleixner
2021-11-29 22:27       ` Logan Gunthorpe
2021-11-29 22:50         ` Dave Jiang
2021-11-29 23:31         ` Jason Gunthorpe
2021-11-29 23:52           ` Logan Gunthorpe
2021-11-30  0:01             ` Jason Gunthorpe
2021-11-30  0:29         ` Thomas Gleixner
2021-11-30 19:21           ` Logan Gunthorpe
2021-11-30 19:48             ` Thomas Gleixner
2021-11-30 20:14               ` Logan Gunthorpe
2021-11-30 20:28               ` Jason Gunthorpe
2021-11-30 21:23                 ` Thomas Gleixner
2021-12-01  0:17                   ` Jason Gunthorpe
2021-12-01 10:16                     ` Thomas Gleixner
2021-12-01 10:16                       ` Thomas Gleixner
2021-12-01 13:00                       ` Jason Gunthorpe via iommu
2021-12-01 13:00                         ` Jason Gunthorpe
2021-12-01 17:35                         ` Thomas Gleixner
2021-12-01 17:35                           ` Thomas Gleixner
2021-12-01 18:14                           ` Jason Gunthorpe via iommu
2021-12-01 18:14                             ` Jason Gunthorpe
2021-12-01 18:46                             ` Logan Gunthorpe
2021-12-01 18:46                               ` Logan Gunthorpe
2021-12-01 20:21                             ` Thomas Gleixner
2021-12-01 20:21                               ` Thomas Gleixner
2021-12-02  0:01                               ` Thomas Gleixner
2021-12-02  0:01                                 ` Thomas Gleixner
2021-12-02 13:55                                 ` Jason Gunthorpe via iommu
2021-12-02 13:55                                   ` Jason Gunthorpe
2021-12-02 14:23                                   ` Greg Kroah-Hartman
2021-12-02 14:23                                     ` Greg Kroah-Hartman
2021-12-02 14:45                                     ` Jason Gunthorpe via iommu
2021-12-02 14:45                                       ` Jason Gunthorpe
2021-12-02 19:25                                   ` Thomas Gleixner
2021-12-02 19:25                                     ` Thomas Gleixner
2021-12-02 20:00                                     ` Jason Gunthorpe via iommu [this message]
2021-12-02 20:00                                       ` Jason Gunthorpe
2021-12-02 22:31                                       ` Thomas Gleixner
2021-12-02 22:31                                         ` Thomas Gleixner
2021-12-03  0:37                                         ` Jason Gunthorpe via iommu
2021-12-03  0:37                                           ` Jason Gunthorpe
2021-12-03 15:07                                           ` Thomas Gleixner
2021-12-03 15:07                                             ` Thomas Gleixner
2021-12-03 16:41                                             ` Jason Gunthorpe via iommu
2021-12-03 16:41                                               ` Jason Gunthorpe
2021-12-04 14:20                                               ` Thomas Gleixner
2021-12-04 14:20                                                 ` Thomas Gleixner
2021-12-05 14:16                                                 ` Thomas Gleixner
2021-12-05 14:16                                                   ` Thomas Gleixner
2021-12-06 14:43                                                   ` Jason Gunthorpe via iommu
2021-12-06 14:43                                                     ` Jason Gunthorpe
2021-12-06 15:47                                                     ` Thomas Gleixner
2021-12-06 15:47                                                       ` Thomas Gleixner
2021-12-06 17:00                                                       ` Jason Gunthorpe via iommu
2021-12-06 17:00                                                         ` Jason Gunthorpe
2021-12-06 20:28                                                         ` Thomas Gleixner
2021-12-06 20:28                                                           ` Thomas Gleixner
2021-12-06 21:06                                                           ` Jason Gunthorpe via iommu
2021-12-06 21:06                                                             ` Jason Gunthorpe
2021-12-06 22:21                                                             ` Thomas Gleixner
2021-12-06 22:21                                                               ` Thomas Gleixner
2021-12-06 14:19                                                 ` Jason Gunthorpe via iommu
2021-12-06 14:19                                                   ` Jason Gunthorpe
2021-12-06 15:06                                                   ` Thomas Gleixner
2021-12-06 15:06                                                     ` Thomas Gleixner
2021-12-09  6:26                                               ` Tian, Kevin
2021-12-09  6:26                                                 ` Tian, Kevin
2021-12-09  9:03                                                 ` Thomas Gleixner
2021-12-09  9:03                                                   ` Thomas Gleixner
2021-12-09 12:17                                                   ` Tian, Kevin
2021-12-09 12:17                                                     ` Tian, Kevin
2021-12-09 15:57                                                     ` Thomas Gleixner
2021-12-09 15:57                                                       ` Thomas Gleixner
2021-12-10  7:37                                                       ` Tian, Kevin
2021-12-10  7:37                                                         ` Tian, Kevin
2021-12-09  5:41                                   ` Tian, Kevin
2021-12-09  5:41                                     ` Tian, Kevin
2021-12-09  5:47                                     ` Jason Wang
2021-12-09  5:47                                       ` Jason Wang
2021-12-01 16:28                       ` Dave Jiang
2021-12-01 16:28                         ` Dave Jiang
2021-12-01 18:41                         ` Thomas Gleixner
2021-12-01 18:41                           ` Thomas Gleixner
2021-12-01 18:47                           ` Dave Jiang
2021-12-01 18:47                             ` Dave Jiang
2021-12-01 20:25                             ` Thomas Gleixner
2021-12-01 20:25                               ` Thomas Gleixner
2021-12-01 21:21                               ` Dave Jiang
2021-12-01 21:21                                 ` Dave Jiang
2021-12-01 21:44                                 ` Thomas Gleixner
2021-12-01 21:44                                   ` Thomas Gleixner
2021-12-01 21:49                                   ` Dave Jiang
2021-12-01 21:49                                     ` Dave Jiang
2021-12-01 22:03                                     ` Thomas Gleixner
2021-12-01 22:03                                       ` Thomas Gleixner
2021-12-01 22:53                                       ` Dave Jiang
2021-12-01 22:53                                         ` Dave Jiang
2021-12-01 23:57                                         ` Thomas Gleixner
2021-12-01 23:57                                           ` Thomas Gleixner
2021-12-09  5:23                                   ` Tian, Kevin
2021-12-09  5:23                                     ` Tian, Kevin
2021-12-09  8:37                                     ` Thomas Gleixner
2021-12-09  8:37                                       ` Thomas Gleixner
2021-12-09 12:31                                       ` Tian, Kevin
2021-12-09 12:31                                         ` Tian, Kevin
2021-12-09 16:21                                       ` Jason Gunthorpe via iommu
2021-12-09 16:21                                         ` Jason Gunthorpe
2021-12-09 20:32                                         ` Thomas Gleixner
2021-12-09 20:32                                           ` Thomas Gleixner
2021-12-09 20:58                                           ` Jason Gunthorpe via iommu
2021-12-09 20:58                                             ` Jason Gunthorpe
2021-12-09 22:09                                             ` Thomas Gleixner
2021-12-09 22:09                                               ` Thomas Gleixner
2021-12-10  0:26                                               ` Thomas Gleixner
2021-12-10  0:26                                                 ` Thomas Gleixner
2021-12-10  7:29                                                 ` Tian, Kevin
2021-12-10  7:29                                                   ` Tian, Kevin
2021-12-10 12:13                                                   ` Thomas Gleixner
2021-12-10 12:13                                                     ` Thomas Gleixner
2021-12-11  8:06                                                     ` Tian, Kevin
2021-12-11  8:06                                                       ` Tian, Kevin
2021-12-10 12:39                                                   ` Jason Gunthorpe via iommu
2021-12-10 12:39                                                     ` Jason Gunthorpe
2021-12-10 19:00                                                     ` Thomas Gleixner
2021-12-10 19:00                                                       ` Thomas Gleixner
2021-12-11  7:44                                                       ` Tian, Kevin
2021-12-11  7:44                                                         ` Tian, Kevin
2021-12-11 13:04                                                         ` Thomas Gleixner
2021-12-11 13:04                                                           ` Thomas Gleixner
2021-12-12  1:56                                                           ` Tian, Kevin
2021-12-12  1:56                                                             ` Tian, Kevin
2021-12-12 20:55                                                             ` Thomas Gleixner
2021-12-12 20:55                                                               ` Thomas Gleixner
2021-12-12 23:37                                                               ` Jason Gunthorpe via iommu
2021-12-12 23:37                                                                 ` Jason Gunthorpe
2021-12-13  7:50                                                                 ` Tian, Kevin
2021-12-13  7:50                                                                   ` Tian, Kevin
2022-09-15  9:24                                                               ` Tian, Kevin
2022-09-20 14:09                                                                 ` Jason Gunthorpe
2022-09-21  7:57                                                                   ` Tian, Kevin
2022-09-21 12:48                                                                     ` Jason Gunthorpe
2022-09-22  5:11                                                                       ` Tian, Kevin
2022-09-22 12:13                                                                         ` Jason Gunthorpe
2022-09-22 22:42                                                                           ` Tian, Kevin
2022-09-23 13:26                                                                             ` Jason Gunthorpe
2021-12-11  7:52                                                     ` Tian, Kevin
2021-12-11  7:52                                                       ` Tian, Kevin
2021-12-12  0:12                                                       ` Thomas Gleixner
2021-12-12  0:12                                                         ` Thomas Gleixner
2021-12-12  2:14                                                         ` Tian, Kevin
2021-12-12  2:14                                                           ` Tian, Kevin
2021-12-12 20:50                                                           ` Thomas Gleixner
2021-12-12 20:50                                                             ` Thomas Gleixner
2021-12-12 23:42                                                         ` Jason Gunthorpe via iommu
2021-12-12 23:42                                                           ` Jason Gunthorpe
2021-12-10  7:36                                             ` Tian, Kevin
2021-12-10  7:36                                               ` Tian, Kevin
2021-12-10 12:30                                               ` Jason Gunthorpe via iommu
2021-12-10 12:30                                                 ` Jason Gunthorpe
2021-12-12  6:44                                               ` Mika Penttilä
2021-12-12  6:44                                                 ` Mika Penttilä
2021-12-12 23:27                                                 ` Jason Gunthorpe via iommu
2021-12-12 23:27                                                   ` Jason Gunthorpe
2021-12-01 14:52                   ` Thomas Gleixner
2021-12-01 15:11                     ` Jason Gunthorpe
2021-12-01 18:37                       ` Thomas Gleixner
2021-12-01 18:47                         ` Jason Gunthorpe
2021-12-01 20:26                           ` Thomas Gleixner
2021-11-27  1:23 ` [patch 22/32] soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 23/32] soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs() Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 24/32] bus: fsl-mc-msi: Simplify MSI descriptor handling Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 25/32] platform-msi: Let core code handle MSI descriptors Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 26/32] platform-msi: Simplify platform device MSI code Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 27/32] genirq/msi: Make interrupt allocation less convoluted Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 28/32] genirq/msi: Convert to new functions Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 29/32] genirq/msi: Mop up old interfaces Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 30/32] genirq/msi: Add abuse prevention comment to msi header Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27  1:23 ` [patch 31/32] genirq/msi: Simplify sysfs handling Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27 12:32   ` Greg Kroah-Hartman
2021-11-27 19:31     ` Thomas Gleixner
2021-11-28 11:07       ` Greg Kroah-Hartman
2021-11-28 19:33         ` Thomas Gleixner
2021-11-27  1:23 ` [patch 32/32] genirq/msi: Convert storage to xarray Thomas Gleixner
2021-11-27  1:24   ` Thomas Gleixner
2021-11-27 12:33   ` Greg Kroah-Hartman

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