From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 2/8] drm/i915/migrate: fix offset calculation
Date: Mon, 6 Dec 2021 13:31:34 +0000 [thread overview]
Message-ID: <20211206133140.3166205-3-matthew.auld@intel.com> (raw)
In-Reply-To: <20211206133140.3166205-1-matthew.auld@intel.com>
Ensure we add the engine base only after we calculate the qword offset
into the PTE window.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 2d3188a398dd..6f2c4388ebb4 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -282,10 +282,10 @@ static int emit_pte(struct i915_request *rq,
GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
/* Compute the page directory offset for the target address range */
- offset += (u64)rq->engine->instance << 32;
offset >>= 12;
offset *= sizeof(u64);
offset += 2 * CHUNK_SZ;
+ offset += (u64)rq->engine->instance << 32;
cs = intel_ring_begin(rq, 6);
if (IS_ERR(cs))
--
2.31.1
WARNING: multiple messages have this Message-ID (diff)
From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
dri-devel@lists.freedesktop.org
Subject: [PATCH v3 2/8] drm/i915/migrate: fix offset calculation
Date: Mon, 6 Dec 2021 13:31:34 +0000 [thread overview]
Message-ID: <20211206133140.3166205-3-matthew.auld@intel.com> (raw)
In-Reply-To: <20211206133140.3166205-1-matthew.auld@intel.com>
Ensure we add the engine base only after we calculate the qword offset
into the PTE window.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 2d3188a398dd..6f2c4388ebb4 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -282,10 +282,10 @@ static int emit_pte(struct i915_request *rq,
GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
/* Compute the page directory offset for the target address range */
- offset += (u64)rq->engine->instance << 32;
offset >>= 12;
offset *= sizeof(u64);
offset += 2 * CHUNK_SZ;
+ offset += (u64)rq->engine->instance << 32;
cs = intel_ring_begin(rq, 6);
if (IS_ERR(cs))
--
2.31.1
next prev parent reply other threads:[~2021-12-06 13:32 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-06 13:31 [Intel-gfx] [PATCH v3 0/8] DG2 accelerated migration/clearing support Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-06 13:31 ` [Intel-gfx] [PATCH v3 1/8] drm/i915/migrate: don't check the scratch page Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-06 13:31 ` Matthew Auld [this message]
2021-12-06 13:31 ` [PATCH v3 2/8] drm/i915/migrate: fix offset calculation Matthew Auld
2021-12-06 13:31 ` [Intel-gfx] [PATCH v3 3/8] drm/i915/migrate: fix length calculation Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-06 13:31 ` [Intel-gfx] [PATCH v3 4/8] drm/i915/selftests: handle object rounding Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-06 13:31 ` [Intel-gfx] [PATCH v3 5/8] drm/i915/gtt: allow overriding the pt alignment Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-13 15:32 ` [Intel-gfx] " Ramalingam C
2021-12-13 15:32 ` Ramalingam C
2021-12-06 13:31 ` [Intel-gfx] [PATCH v3 6/8] drm/i915/gtt: add xehpsdv_ppgtt_insert_entry Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-06 13:31 ` [Intel-gfx] [PATCH v3 7/8] drm/i915/migrate: add acceleration support for DG2 Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-14 10:56 ` [Intel-gfx] " Ramalingam C
2021-12-14 10:56 ` Ramalingam C
2021-12-14 12:32 ` [Intel-gfx] " Matthew Auld
2021-12-14 12:32 ` Matthew Auld
2021-12-16 15:01 ` [Intel-gfx] " Ramalingam C
2021-12-16 15:01 ` Ramalingam C
2021-12-06 13:31 ` [Intel-gfx] [PATCH v3 8/8] drm/i915/migrate: turn on acceleration " Matthew Auld
2021-12-06 13:31 ` Matthew Auld
2021-12-06 14:05 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for DG2 accelerated migration/clearing support (rev2) Patchwork
2021-12-06 14:49 ` [Intel-gfx] [PATCH v3 0/8] DG2 accelerated migration/clearing support Daniel Stone
2021-12-06 14:49 ` Daniel Stone
2021-12-06 15:13 ` [Intel-gfx] " Matthew Auld
2021-12-06 15:13 ` Matthew Auld
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