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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Rob Herring <robh@kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	linux-mtd@lists.infradead.org, Mark Brown <broonie@kernel.org>,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Michal Simek <monstr@monstr.eu>
Subject: Re: [PATCH v3 2/3] spi: dt-bindings: Describe stacked/parallel memories modes
Date: Fri, 10 Dec 2021 21:07:30 +0100	[thread overview]
Message-ID: <20211210210730.07dc672d@xps13> (raw)
In-Reply-To: <Ya5++vUkIKXtE1ja@robh.at.kernel.org>

Hi Rob,

robh@kernel.org wrote on Mon, 6 Dec 2021 15:22:02 -0600:

> On Mon, Dec 06, 2021 at 10:59:20AM +0100, Miquel Raynal wrote:
> > Describe two new memories modes:
> > - A stacked mode when the bus is common but the address space extended
> >   with an additinals wires.
> > - A parallel mode with parallel busses accessing parallel flashes where
> >   the data is spread.
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >  .../bindings/spi/spi-peripheral-props.yaml    | 21 +++++++++++++++++++
> >  1 file changed, 21 insertions(+)  
> 
> Reviewed-by: Rob Herring <robh@kernel.org>

I am sending a new version of this series so that I can get feedback on
other way of describing the flashes, so I'll drop your tag because I'll
need you to re-check that I'm not doing anything silly (it took me a
while to understand the array vs. matrix logic).

Thanks,
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Rob Herring <robh@kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
	linux-mtd@lists.infradead.org, Mark Brown <broonie@kernel.org>,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Michal Simek <monstr@monstr.eu>
Subject: Re: [PATCH v3 2/3] spi: dt-bindings: Describe stacked/parallel memories modes
Date: Fri, 10 Dec 2021 21:07:30 +0100	[thread overview]
Message-ID: <20211210210730.07dc672d@xps13> (raw)
In-Reply-To: <Ya5++vUkIKXtE1ja@robh.at.kernel.org>

Hi Rob,

robh@kernel.org wrote on Mon, 6 Dec 2021 15:22:02 -0600:

> On Mon, Dec 06, 2021 at 10:59:20AM +0100, Miquel Raynal wrote:
> > Describe two new memories modes:
> > - A stacked mode when the bus is common but the address space extended
> >   with an additinals wires.
> > - A parallel mode with parallel busses accessing parallel flashes where
> >   the data is spread.
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >  .../bindings/spi/spi-peripheral-props.yaml    | 21 +++++++++++++++++++
> >  1 file changed, 21 insertions(+)  
> 
> Reviewed-by: Rob Herring <robh@kernel.org>

I am sending a new version of this series so that I can get feedback on
other way of describing the flashes, so I'll drop your tag because I'll
need you to re-check that I'm not doing anything silly (it took me a
while to understand the array vs. matrix logic).

Thanks,
Miquèl

  reply	other threads:[~2021-12-10 20:08 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-06  9:59 [PATCH v3 0/3] Stacked/parallel memories bindings Miquel Raynal
2021-12-06  9:59 ` Miquel Raynal
2021-12-06  9:59 ` [PATCH v3 1/3] dt-bindings: mtd: spi-nor: Allow two CS per device Miquel Raynal
2021-12-06  9:59   ` Miquel Raynal
2021-12-07  7:16   ` Tudor.Ambarus
2021-12-07  7:16     ` Tudor.Ambarus
2021-12-07  8:44     ` Miquel Raynal
2021-12-07  8:44       ` Miquel Raynal
2021-12-06  9:59 ` [PATCH v3 2/3] spi: dt-bindings: Describe stacked/parallel memories modes Miquel Raynal
2021-12-06  9:59   ` Miquel Raynal
2021-12-06 21:22   ` Rob Herring
2021-12-06 21:22     ` Rob Herring
2021-12-10 20:07     ` Miquel Raynal [this message]
2021-12-10 20:07       ` Miquel Raynal
2021-12-07  7:14   ` Pratyush Yadav
2021-12-07  7:14     ` Pratyush Yadav
2021-12-07  7:35     ` Tudor.Ambarus
2021-12-07  7:35       ` Tudor.Ambarus
2021-12-07  7:43       ` Tudor.Ambarus
2021-12-07  7:43         ` Tudor.Ambarus
2021-12-07  7:47         ` Tudor.Ambarus
2021-12-07  7:47           ` Tudor.Ambarus
2021-12-07  7:57       ` Pratyush Yadav
2021-12-07  7:57         ` Pratyush Yadav
2021-12-07  8:37         ` Miquel Raynal
2021-12-07  8:37           ` Miquel Raynal
2021-12-06  9:59 ` [PATCH v3 3/3] spi: dt-bindings: Add an example with two stacked flashes Miquel Raynal
2021-12-06  9:59   ` Miquel Raynal
2021-12-06 21:31   ` Rob Herring
2021-12-06 21:31     ` Rob Herring
2021-12-06 21:31 ` [PATCH v3 0/3] Stacked/parallel memories bindings Rob Herring
2021-12-06 21:31   ` Rob Herring
2021-12-07 14:31   ` Mark Brown
2021-12-07 14:31     ` Mark Brown

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