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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Dave Gerlach <d-gerlach@ti.com>,
	Joe Hershberger <joe.hershberger@ni.com>,
	 Ramon Fried <rfried.dev@gmail.com>,
	Tom Rini <trini@konsulko.com>
Cc: <u-boot@lists.denx.de>, Vignesh Raghavendra <vigneshr@ti.com>,
	Grygorii Strashko <grygorii.strashko@ti.com>
Subject: [PATCH 3/8] board: ti: am64x: Init DRAM size in R5/A53 SPL
Date: Fri, 24 Dec 2021 12:55:31 +0530	[thread overview]
Message-ID: <20211224072536.270251-4-vigneshr@ti.com> (raw)
In-Reply-To: <20211224072536.270251-1-vigneshr@ti.com>

Call dram_init_banksize() from spl_board_init() otherwise TFTP download
fails due to lmb_get_free_size() not able to find unreserved region due
to lack of DRAM size info. Required to support Ethernet boot on AM64x.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 board/ti/am64x/evm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
index 1a9f69c6cf..8373c768f1 100644
--- a/board/ti/am64x/evm.c
+++ b/board/ti/am64x/evm.c
@@ -196,5 +196,8 @@ void spl_board_init(void)
 	val = readl(CTRLMMR_USB0_PHY_CTRL);
 	val &= ~(CORE_VOLTAGE);
 	writel(val, CTRLMMR_USB0_PHY_CTRL);
+
+	/* Init DRAM size for R5/A53 SPL */
+	dram_init_banksize();
 }
 #endif
-- 
2.34.1


  parent reply	other threads:[~2021-12-24  7:26 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-24  7:25 [PATCH 0/8] ARM: ti: AM64x: Add Ethernet boot support on AM64x SK Vignesh Raghavendra
2021-12-24  7:25 ` [PATCH 1/8] mach-k3: common: Instantiate AM65 CPSW NUSS wrapper Vignesh Raghavendra
2022-01-17 18:36   ` Tom Rini
2021-12-24  7:25 ` [PATCH 2/8] net: ti: am65-cpsw: Add support for multi port independent MAC mode Vignesh Raghavendra
2021-12-29 19:31   ` Ramon Fried
2022-01-21  4:18     ` Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2022-01-20 23:13     ` Ramon Fried
2022-01-20 23:19       ` Tom Rini
2022-01-21  4:32         ` Vignesh Raghavendra
2021-12-24  7:25 ` Vignesh Raghavendra [this message]
2022-01-17 18:37   ` [PATCH 3/8] board: ti: am64x: Init DRAM size in R5/A53 SPL Tom Rini
2021-12-24  7:25 ` [PATCH 4/8] mach-k3: am642_init: Probe AM65 CPSW NUSS for " Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2021-12-24  7:25 ` [PATCH 5/8] mach-k3: am64_spl: Alias Ethernet RGMII boot to CPGMAC Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2021-12-24  7:25 ` [PATCH 6/8] configs: am64x_evm: set eth1 as boot interface Vignesh Raghavendra
2022-01-17 14:46   ` Tom Rini
2022-01-21  7:11     ` Vignesh Raghavendra
2021-12-24  7:25 ` [PATCH 7/8] ARM: dts: K3-am642-r5-sk: Enable Second CPSW port in R5/A53 SPL Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2021-12-24  7:25 ` [PATCH 8/8] configs: am64x_evm_r5/a53_defconfig: Enable configs required for Ethboot Vignesh Raghavendra
2022-01-17 14:47   ` Tom Rini
2022-01-21  4:29     ` Vignesh Raghavendra
2022-01-21 14:57       ` Tom Rini
2022-01-21 15:18         ` Vignesh Raghavendra
2022-01-21 15:21           ` Tom Rini

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