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From: Jisheng Zhang <jszhang3@mail.ustc.edu.cn>
To: Alexandre ghiti <alex@ghiti.fr>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: mm: fix wrong phys_ram_base value for RV64
Date: Sun, 26 Dec 2021 16:10:56 +0800	[thread overview]
Message-ID: <20211226161056.5ef4a5d9@xhacker> (raw)
In-Reply-To: <baa3e6dc-cfbc-c491-384a-639867734a7f@ghiti.fr>

On Thu, 2 Dec 2021 16:52:08 +0100
Alexandre ghiti <alex@ghiti.fr> wrote:

> On 12/2/21 16:36, Jisheng Zhang wrote:
> > Currently, if 64BIT and !XIP_KERNEL, the phys_ram_base is always 0,
> > no matter the real start of dram reported by memblock is. The original
> > patch[1] is correct, I believe it's not corrected merged due to lots
> > of #ifdef in arch/riscv/mm/init.c, I plan to send a clean up series
> > soon.
> >
> > [1] http://lists.infradead.org/pipermail/linux-riscv/2021-July/007650.html
> >
> > Fixes: 6d7f91d914bc ("riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion")
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > ---
> >   arch/riscv/mm/init.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> > index 24b2b8044602..3c0649dba4ff 100644
> > --- a/arch/riscv/mm/init.c
> > +++ b/arch/riscv/mm/init.c
> > @@ -187,10 +187,10 @@ static void __init setup_bootmem(void)
> >   
> >   
> >   	phys_ram_end = memblock_end_of_DRAM();
> > -#ifndef CONFIG_64BIT
> >   #ifndef CONFIG_XIP_KERNEL
> >   	phys_ram_base = memblock_start_of_DRAM();
> >   #endif
> > +#ifndef CONFIG_64BIT
> >   	/*
> >   	 * memblock allocator is not aware of the fact that last 4K bytes of
> >   	 * the addressable memory can not be mapped because of IS_ERR_VALUE  
> 
> 
> Good catch, you can add:
> 
> Reviewed-by: Alexandre Ghiti <alex@ghiti.fr>
> 

Hi Palmer,

I noticed this patch is missing in recent riscv fixes pull.

Thanks


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WARNING: multiple messages have this Message-ID (diff)
From: Jisheng Zhang <jszhang3@mail.ustc.edu.cn>
To: Alexandre ghiti <alex@ghiti.fr>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: mm: fix wrong phys_ram_base value for RV64
Date: Sun, 26 Dec 2021 16:10:56 +0800	[thread overview]
Message-ID: <20211226161056.5ef4a5d9@xhacker> (raw)
In-Reply-To: <baa3e6dc-cfbc-c491-384a-639867734a7f@ghiti.fr>

On Thu, 2 Dec 2021 16:52:08 +0100
Alexandre ghiti <alex@ghiti.fr> wrote:

> On 12/2/21 16:36, Jisheng Zhang wrote:
> > Currently, if 64BIT and !XIP_KERNEL, the phys_ram_base is always 0,
> > no matter the real start of dram reported by memblock is. The original
> > patch[1] is correct, I believe it's not corrected merged due to lots
> > of #ifdef in arch/riscv/mm/init.c, I plan to send a clean up series
> > soon.
> >
> > [1] http://lists.infradead.org/pipermail/linux-riscv/2021-July/007650.html
> >
> > Fixes: 6d7f91d914bc ("riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion")
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > ---
> >   arch/riscv/mm/init.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> > index 24b2b8044602..3c0649dba4ff 100644
> > --- a/arch/riscv/mm/init.c
> > +++ b/arch/riscv/mm/init.c
> > @@ -187,10 +187,10 @@ static void __init setup_bootmem(void)
> >   
> >   
> >   	phys_ram_end = memblock_end_of_DRAM();
> > -#ifndef CONFIG_64BIT
> >   #ifndef CONFIG_XIP_KERNEL
> >   	phys_ram_base = memblock_start_of_DRAM();
> >   #endif
> > +#ifndef CONFIG_64BIT
> >   	/*
> >   	 * memblock allocator is not aware of the fact that last 4K bytes of
> >   	 * the addressable memory can not be mapped because of IS_ERR_VALUE  
> 
> 
> Good catch, you can add:
> 
> Reviewed-by: Alexandre Ghiti <alex@ghiti.fr>
> 

Hi Palmer,

I noticed this patch is missing in recent riscv fixes pull.

Thanks


  reply	other threads:[~2021-12-26  8:19 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-02 15:36 [PATCH] riscv: mm: fix wrong phys_ram_base value for RV64 Jisheng Zhang
2021-12-02 15:36 ` Jisheng Zhang
2021-12-02 15:52 ` Alexandre ghiti
2021-12-02 15:52   ` Alexandre ghiti
2021-12-26  8:10   ` Jisheng Zhang [this message]
2021-12-26  8:10     ` Jisheng Zhang
2022-01-11 17:28 ` Palmer Dabbelt
2022-01-11 17:28   ` Palmer Dabbelt

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