* [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally
@ 2022-01-07 13:18 Helge Deller
2022-01-07 13:18 ` [PATCH 2/2] parisc: Re-use toc_stack as hpmc_stack Helge Deller
2022-01-11 15:06 ` [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally Jeroen Roovers
0 siblings, 2 replies; 4+ messages in thread
From: Helge Deller @ 2022-01-07 13:18 UTC (permalink / raw)
To: linux-parisc; +Cc: James Bottomley, John David Anglin, Sven Schnelle
Before this patch, the TOC code used a pre-allocated stack of 16kb for
each possible CPU. That space overhead was the reason why the TOC
feature wasn't enabled by default for 32-bit kernels.
This patch rewrites the TOC code to use a per-cpu stack. That way we use
much less memory now and as such we enable the TOC feature by default on
all kernels.
Additionally the dump of the registers and the stacktrace wasn't
serialized, which led to multiple CPUs printing the stack backtrace at
once which rendered the output unreadable.
Now the backtraces are nicely serialized by a lock.
Signed-off-by: Helge Deller <deller@gmx.de>
---
arch/parisc/Kconfig | 14 --------------
arch/parisc/kernel/Makefile | 3 +--
arch/parisc/kernel/asm-offsets.c | 1 +
arch/parisc/kernel/toc.c | 19 ++++++++++++++++---
arch/parisc/kernel/toc_asm.S | 29 +++++++----------------------
5 files changed, 25 insertions(+), 41 deletions(-)
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 011dc32fdb4d..f55ccd1161f3 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -287,20 +287,6 @@ config SMP
If you don't know what to do here, say N.
-config TOC
- bool "Support TOC switch"
- default y if 64BIT || !SMP
- help
- Most PA-RISC machines have either a switch at the back of the machine
- or a command in BMC to trigger a TOC interrupt. If you say Y here a
- handler will be installed which will either show a backtrace on all
- CPUs, or enter a possible configured debugger like kgdb/kdb.
-
- Note that with this option enabled, the kernel will use an additional 16KB
- per possible CPU as a special stack for the TOC handler.
-
- If you don't want to debug the Kernel, say N.
-
config PARISC_CPU_TOPOLOGY
bool "Support cpu topology definition"
depends on SMP
diff --git a/arch/parisc/kernel/Makefile b/arch/parisc/kernel/Makefile
index ed0b87908d71..8fb819bbbb17 100644
--- a/arch/parisc/kernel/Makefile
+++ b/arch/parisc/kernel/Makefile
@@ -10,7 +10,7 @@ obj-y := cache.o pacache.o setup.o pdt.o traps.o time.o irq.o \
ptrace.o hardware.o inventory.o drivers.o alternative.o \
signal.o hpmc.o real2.o parisc_ksyms.o unaligned.o \
process.o processor.o pdc_cons.o pdc_chassis.o unwind.o \
- patch.o
+ patch.o toc.o toc_asm.o
ifdef CONFIG_FUNCTION_TRACER
# Do not profile debug and lowlevel utilities
@@ -39,4 +39,3 @@ obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_KPROBES) += kprobes.o
obj-$(CONFIG_KEXEC_CORE) += kexec.o relocate_kernel.o
obj-$(CONFIG_KEXEC_FILE) += kexec_file.o
-obj-$(CONFIG_TOC) += toc.o toc_asm.o
diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c
index 396aa3b47712..68b9dbd0c30b 100644
--- a/arch/parisc/kernel/asm-offsets.c
+++ b/arch/parisc/kernel/asm-offsets.c
@@ -36,6 +36,7 @@
int main(void)
{
DEFINE(TASK_TI_FLAGS, offsetof(struct task_struct, thread_info.flags));
+ DEFINE(TASK_TI_CPU, offsetof(struct task_struct, thread_info.cpu));
DEFINE(TASK_STACK, offsetof(struct task_struct, stack));
DEFINE(TASK_PAGEFAULT_DISABLED, offsetof(struct task_struct, pagefault_disabled));
BLANK();
diff --git a/arch/parisc/kernel/toc.c b/arch/parisc/kernel/toc.c
index 18327611cf8f..dce20a54b21f 100644
--- a/arch/parisc/kernel/toc.c
+++ b/arch/parisc/kernel/toc.c
@@ -9,8 +9,10 @@
#include <asm/pdc.h>
#include <asm/pdc_chassis.h>
+#include <asm/ldcw.h>
-unsigned int __aligned(16) toc_lock = 1;
+static unsigned int __aligned(16) toc_lock = 1;
+DEFINE_PER_CPU_PAGE_ALIGNED(char [16384], toc_stack);
static void toc20_to_pt_regs(struct pt_regs *regs, struct pdc_toc_pim_20 *toc)
{
@@ -63,7 +65,8 @@ void notrace __noreturn __cold toc_intr(struct pt_regs *regs)
struct pdc_toc_pim_20 pim_data20;
struct pdc_toc_pim_11 pim_data11;
- nmi_enter();
+ /* verify we wrote regs to the correct stack */
+ BUG_ON(regs != (struct pt_regs *)&per_cpu(toc_stack, raw_smp_processor_id()));
if (boot_cpu_data.cpu_type >= pcxu) {
if (pdc_pim_toc20(&pim_data20))
@@ -76,14 +79,24 @@ void notrace __noreturn __cold toc_intr(struct pt_regs *regs)
}
#ifdef CONFIG_KGDB
+ nmi_enter();
+
if (atomic_read(&kgdb_active) != -1)
kgdb_nmicallback(raw_smp_processor_id(), regs);
kgdb_handle_exception(9, SIGTRAP, 0, regs);
-#endif
+#else
+ /* serialize output, otherwise all CPUs write backtrace at once */
+ while (__ldcw(&toc_lock) == 0)
+ ; /* wait */
show_regs(regs);
+ toc_lock = 1; /* release lock for next CPU */
+
+ if (raw_smp_processor_id() != 0)
+ while (1) ; /* all but monarch CPU will wait endless. */
/* give other CPUs time to show their backtrace */
mdelay(2000);
+#endif
machine_restart("TOC");
/* should never reach this */
diff --git a/arch/parisc/kernel/toc_asm.S b/arch/parisc/kernel/toc_asm.S
index e94ba8044190..a04545289ce9 100644
--- a/arch/parisc/kernel/toc_asm.S
+++ b/arch/parisc/kernel/toc_asm.S
@@ -5,33 +5,22 @@
.level 1.1
#include <asm/assembly.h>
-#include <asm/psw.h>
#include <linux/threads.h>
#include <linux/linkage.h>
.text
.import toc_intr,code
- .import toc_lock,data
+ .import toc_stack,data
.align 16
ENTRY_CFI(toc_handler)
- /*
- * synchronize CPUs and obtain offset
- * for stack setup.
- */
- load32 PA(toc_lock),%r1
-0: ldcw,co 0(%r1),%r2
- cmpib,= 0,%r2,0b
- nop
- addi 1,%r2,%r4
- stw %r4,0(%r1)
- addi -1,%r2,%r4
+ mfctl %cr30, %r1
+ tophys %r1,%r2 /* task_struct */
+ LDREG TASK_TI_CPU(%r2),%r4 /* cpu */
+ /* get per-cpu toc_stack address. */
load32 PA(toc_stack),%sp
- /*
- * deposit CPU number into stack address,
- * so every CPU will have its own stack.
- */
- SHLREG %r4,14,%r4
+ load32 PA(__per_cpu_offset),%r1
+ LDREGX %r4(%r1),%r4
add %r4,%sp,%sp
/*
@@ -82,7 +71,3 @@ ENDPROC_CFI(toc_handler)
*/
SYM_DATA(toc_handler_csum, .long 0)
SYM_DATA(toc_handler_size, .long . - toc_handler)
-
- __PAGE_ALIGNED_BSS
- .align 64
-SYM_DATA(toc_stack, .block 16384*NR_CPUS)
--
2.31.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] parisc: Re-use toc_stack as hpmc_stack
2022-01-07 13:18 [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally Helge Deller
@ 2022-01-07 13:18 ` Helge Deller
2022-01-11 15:06 ` [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally Jeroen Roovers
1 sibling, 0 replies; 4+ messages in thread
From: Helge Deller @ 2022-01-07 13:18 UTC (permalink / raw)
To: linux-parisc; +Cc: James Bottomley, John David Anglin, Sven Schnelle
No need to have an own hpmc_stack. Just re-use the toc_stack of the
monarch CPU as either a TOC or a HPMC will happen at the same time.
This reduces the kernel memory footprint by 16k.
Signed-off-by: Helge Deller <deller@gmx.de>
---
arch/parisc/kernel/hpmc.S | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/parisc/kernel/hpmc.S b/arch/parisc/kernel/hpmc.S
index c2981401775c..eb2e4bd67035 100644
--- a/arch/parisc/kernel/hpmc.S
+++ b/arch/parisc/kernel/hpmc.S
@@ -43,10 +43,8 @@
* IODC requires 7K byte stack. That leaves 1K byte for os_hpmc.
*/
- __PAGE_ALIGNED_BSS
- .align 4096
-hpmc_stack:
- .block 16384
+ .import toc_stack,data
+#define hpmc_stack toc_stack /* re-use the TOC stack */
#define HPMC_IODC_BUF_SIZE 0x8000
--
2.31.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally
2022-01-07 13:18 [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally Helge Deller
2022-01-07 13:18 ` [PATCH 2/2] parisc: Re-use toc_stack as hpmc_stack Helge Deller
@ 2022-01-11 15:06 ` Jeroen Roovers
2022-01-11 15:10 ` Helge Deller
1 sibling, 1 reply; 4+ messages in thread
From: Jeroen Roovers @ 2022-01-11 15:06 UTC (permalink / raw)
To: Helge Deller
Cc: linux-parisc, James Bottomley, John David Anglin, Sven Schnelle
Hi,
On Fri, 7 Jan 2022 14:18:49 +0100
Helge Deller <deller@gmx.de> wrote:
> Before this patch, the TOC code used a pre-allocated stack of 16kb for
> each possible CPU. That space overhead was the reason why the TOC
> feature wasn't enabled by default for 32-bit kernels.
Referring to the message subject, shouldn't that read
"TOC (Transfer-of-control)", or similar? See [1] and [2].
Cheers,
jer
[1]
https://parisc.wiki.kernel.org/images-parisc/1/18/HP_C8000_Manual.pdf
, page 1-9: "Transfer-of-control (TOC) button"
[2] Ibid., page 3-4: "Transfer of Control (TOC) Button"
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally
2022-01-11 15:06 ` [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally Jeroen Roovers
@ 2022-01-11 15:10 ` Helge Deller
0 siblings, 0 replies; 4+ messages in thread
From: Helge Deller @ 2022-01-11 15:10 UTC (permalink / raw)
To: Jeroen Roovers
Cc: linux-parisc, James Bottomley, John David Anglin, Sven Schnelle
On 1/11/22 16:06, Jeroen Roovers wrote:
> On Fri, 7 Jan 2022 14:18:49 +0100
>> Before this patch, the TOC code used a pre-allocated stack of 16kb for
>> each possible CPU. That space overhead was the reason why the TOC
>> feature wasn't enabled by default for 32-bit kernels.
>
> Referring to the message subject, shouldn't that read
> "TOC (Transfer-of-control)", or similar? See [1] and [2].
Uh, yes.
I've just pushed it. Fixing that typo isn't so important IMHO, so I leave it as is.
Thanks for noticing!
Helge
^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-01-07 13:18 [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally Helge Deller
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2022-01-11 15:06 ` [PATCH 1/2] parisc: Enable TOC (transfer of contents) feature unconditionally Jeroen Roovers
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