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From: Michael Tretter <m.tretter@pengutronix.de>
To: Robert Hancock <robert.hancock@calian.com>
Cc: linux-iio@vger.kernel.org, robh+dt@kernel.org,
	michal.simek@xilinx.com, anand.ashok.dumbre@xilinx.com,
	jic23@kernel.org, lars@metafoo.de, manish.narani@xilinx.com,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	kernel@pengutronix.de
Subject: Re: [PATCH 3/4] iio: adc: xilinx-ams: Fixed wrong sequencer register settings
Date: Tue, 25 Jan 2022 09:21:08 +0100	[thread overview]
Message-ID: <20220125082108.GE25856@pengutronix.de> (raw)
In-Reply-To: <20220120010246.3794962-4-robert.hancock@calian.com>

On Wed, 19 Jan 2022 19:02:45 -0600, Robert Hancock wrote:
> Register settings used for the sequencer configuration register
> were incorrect, causing some inputs to not be read properly.
> 
> Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver")
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> ---
>  drivers/iio/adc/xilinx-ams.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
> index b93864362dac..199027c93cdc 100644
> --- a/drivers/iio/adc/xilinx-ams.c
> +++ b/drivers/iio/adc/xilinx-ams.c
> @@ -91,8 +91,8 @@
>  
>  #define AMS_CONF1_SEQ_MASK		GENMASK(15, 12)
>  #define AMS_CONF1_SEQ_DEFAULT		FIELD_PREP(AMS_CONF1_SEQ_MASK, 0)
> -#define AMS_CONF1_SEQ_CONTINUOUS	FIELD_PREP(AMS_CONF1_SEQ_MASK, 1)
> -#define AMS_CONF1_SEQ_SINGLE_CHANNEL	FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
> +#define AMS_CONF1_SEQ_CONTINUOUS	FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
> +#define AMS_CONF1_SEQ_SINGLE_CHANNEL	FIELD_PREP(AMS_CONF1_SEQ_MASK, 3)

The TRM states that Continuous Loop Mode is 2, but Single Pass Sequence Mode
is 1, not 3. Is there a reason, why you need to set both bits?

Michael

>  
>  #define AMS_REG_SEQ0_MASK		GENMASK(15, 0)
>  #define AMS_REG_SEQ2_MASK		GENMASK(21, 16)
> -- 
> 2.31.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

WARNING: multiple messages have this Message-ID (diff)
From: Michael Tretter <m.tretter@pengutronix.de>
To: Robert Hancock <robert.hancock@calian.com>
Cc: linux-iio@vger.kernel.org, robh+dt@kernel.org,
	michal.simek@xilinx.com, anand.ashok.dumbre@xilinx.com,
	jic23@kernel.org, lars@metafoo.de, manish.narani@xilinx.com,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	kernel@pengutronix.de
Subject: Re: [PATCH 3/4] iio: adc: xilinx-ams: Fixed wrong sequencer register settings
Date: Tue, 25 Jan 2022 09:21:08 +0100	[thread overview]
Message-ID: <20220125082108.GE25856@pengutronix.de> (raw)
In-Reply-To: <20220120010246.3794962-4-robert.hancock@calian.com>

On Wed, 19 Jan 2022 19:02:45 -0600, Robert Hancock wrote:
> Register settings used for the sequencer configuration register
> were incorrect, causing some inputs to not be read properly.
> 
> Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver")
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> ---
>  drivers/iio/adc/xilinx-ams.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
> index b93864362dac..199027c93cdc 100644
> --- a/drivers/iio/adc/xilinx-ams.c
> +++ b/drivers/iio/adc/xilinx-ams.c
> @@ -91,8 +91,8 @@
>  
>  #define AMS_CONF1_SEQ_MASK		GENMASK(15, 12)
>  #define AMS_CONF1_SEQ_DEFAULT		FIELD_PREP(AMS_CONF1_SEQ_MASK, 0)
> -#define AMS_CONF1_SEQ_CONTINUOUS	FIELD_PREP(AMS_CONF1_SEQ_MASK, 1)
> -#define AMS_CONF1_SEQ_SINGLE_CHANNEL	FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
> +#define AMS_CONF1_SEQ_CONTINUOUS	FIELD_PREP(AMS_CONF1_SEQ_MASK, 2)
> +#define AMS_CONF1_SEQ_SINGLE_CHANNEL	FIELD_PREP(AMS_CONF1_SEQ_MASK, 3)

The TRM states that Continuous Loop Mode is 2, but Single Pass Sequence Mode
is 1, not 3. Is there a reason, why you need to set both bits?

Michael

>  
>  #define AMS_REG_SEQ0_MASK		GENMASK(15, 0)
>  #define AMS_REG_SEQ2_MASK		GENMASK(21, 16)
> -- 
> 2.31.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-01-25  9:11 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-20  1:02 [PATCH 0/4] Xilinx AMS fixes Robert Hancock
2022-01-20  1:02 ` Robert Hancock
2022-01-20  1:02 ` [PATCH 1/4] arm64: dts: zynqmp: add AMS driver to device tree Robert Hancock
2022-01-20  1:02   ` Robert Hancock
2022-01-25  8:02   ` Michael Tretter
2022-01-25  8:02     ` Michael Tretter
2022-01-25  9:42   ` Michal Simek
2022-01-25  9:42     ` Michal Simek
2022-01-20  1:02 ` [PATCH 2/4] iio: adc: xilinx-ams: Fixed missing PS channels Robert Hancock
2022-01-20  1:02   ` Robert Hancock
2022-01-20  1:09   ` Robert Hancock
2022-01-20  1:09     ` Robert Hancock
2022-01-25  8:06     ` Michael Tretter
2022-01-25  8:06       ` Michael Tretter
2022-01-30 12:29       ` Jonathan Cameron
2022-01-30 12:29         ` Jonathan Cameron
2022-01-20  1:02 ` [PATCH 3/4] iio: adc: xilinx-ams: Fixed wrong sequencer register settings Robert Hancock
2022-01-20  1:02   ` Robert Hancock
2022-01-25  8:21   ` Michael Tretter [this message]
2022-01-25  8:21     ` Michael Tretter
2022-01-25 16:15     ` Robert Hancock
2022-01-25 16:15       ` Robert Hancock
2022-01-26  9:12       ` Michael Tretter
2022-01-26  9:12         ` Michael Tretter
2022-01-30 12:31         ` Jonathan Cameron
2022-01-30 12:31           ` Jonathan Cameron
2022-01-20  1:02 ` [PATCH 4/4] iio: adc: xilinx-ams: Fix single channel switching sequence Robert Hancock
2022-01-20  1:02   ` Robert Hancock
2022-01-30 12:34   ` Jonathan Cameron
2022-01-30 12:34     ` Jonathan Cameron

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