From: Peter Geis <pgwipeout@gmail.com>
To: Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Robert Foss <robert.foss@linaro.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Archit Taneja <architt@codeaurora.org>,
Pierre-Hugues Husson <phh@phh.me>
Cc: "Peter Geis" <pgwipeout@gmail.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Robin Murphy" <robin.murphy@arm.com>,
linux-rockchip@lists.infradead.org,
"Heiko Stübner" <heiko@sntech.de>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2] drm/bridge: synopsys/dw-hdmi: set cec clock rate
Date: Wed, 26 Jan 2022 16:01:37 -0500 [thread overview]
Message-ID: <20220126210137.3065508-1-pgwipeout@gmail.com> (raw)
The hdmi-cec clock must be 32khz in order for cec to work correctly.
Ensure before enabling the clock we set it in order for the hardware to
work as expected.
Fixes hdmi-cec support on Rockchip devices.
Fixes: ebe32c3e282a ("drm/bridge: synopsys/dw-hdmi: Enable cec clock")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
Changelog:
v2:
- Set the clock rate before enabling the clock
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 54d8fdad395f..65c16455b76a 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -48,6 +48,9 @@
#define HDMI14_MAX_TMDSCLK 340000000
+/* HDMI CEC needs a clock rate of 32khz */
+#define HDMI_CEC_CLK_RATE 32768
+
enum hdmi_datamap {
RGB444_8B = 0x01,
RGB444_10B = 0x03,
@@ -3341,6 +3344,10 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
hdmi->cec_clk = NULL;
goto err_iahb;
} else {
+ ret = clk_set_rate(hdmi->cec_clk, HDMI_CEC_CLK_RATE);
+ if (ret)
+ dev_warn(hdmi->dev, "Cannot set HDMI cec clock rate: %d\n", ret);
+
ret = clk_prepare_enable(hdmi->cec_clk);
if (ret) {
dev_err(hdmi->dev, "Cannot enable HDMI cec clock: %d\n",
--
2.25.1
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Peter Geis <pgwipeout@gmail.com>
To: Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Robert Foss <robert.foss@linaro.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Archit Taneja <architt@codeaurora.org>,
Pierre-Hugues Husson <phh@phh.me>
Cc: Sascha Hauer <s.hauer@pengutronix.de>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-rockchip@lists.infradead.org,
Peter Geis <pgwipeout@gmail.com>,
Robin Murphy <robin.murphy@arm.com>
Subject: [PATCH v2] drm/bridge: synopsys/dw-hdmi: set cec clock rate
Date: Wed, 26 Jan 2022 16:01:37 -0500 [thread overview]
Message-ID: <20220126210137.3065508-1-pgwipeout@gmail.com> (raw)
The hdmi-cec clock must be 32khz in order for cec to work correctly.
Ensure before enabling the clock we set it in order for the hardware to
work as expected.
Fixes hdmi-cec support on Rockchip devices.
Fixes: ebe32c3e282a ("drm/bridge: synopsys/dw-hdmi: Enable cec clock")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
Changelog:
v2:
- Set the clock rate before enabling the clock
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 54d8fdad395f..65c16455b76a 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -48,6 +48,9 @@
#define HDMI14_MAX_TMDSCLK 340000000
+/* HDMI CEC needs a clock rate of 32khz */
+#define HDMI_CEC_CLK_RATE 32768
+
enum hdmi_datamap {
RGB444_8B = 0x01,
RGB444_10B = 0x03,
@@ -3341,6 +3344,10 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
hdmi->cec_clk = NULL;
goto err_iahb;
} else {
+ ret = clk_set_rate(hdmi->cec_clk, HDMI_CEC_CLK_RATE);
+ if (ret)
+ dev_warn(hdmi->dev, "Cannot set HDMI cec clock rate: %d\n", ret);
+
ret = clk_prepare_enable(hdmi->cec_clk);
if (ret) {
dev_err(hdmi->dev, "Cannot enable HDMI cec clock: %d\n",
--
2.25.1
next reply other threads:[~2022-01-26 21:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-26 21:01 Peter Geis [this message]
2022-01-26 21:01 ` [PATCH v2] drm/bridge: synopsys/dw-hdmi: set cec clock rate Peter Geis
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