* arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
@ 2022-01-28 3:58 kernel test robot
0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2022-01-28 3:58 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 4123 bytes --]
CC: kbuild-all(a)lists.01.org
CC: linux-kernel(a)vger.kernel.org
TO: Peter Zijlstra <peterz@infradead.org>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@kernel.org>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 23a46422c56144939c091c76cf389aa863ce9c18
commit: 63b3f96e1a989846a5a521d4fbef4bc86406929d kvm: Select SCHED_INFO instead of TASK_DELAY_ACCT
date: 9 months ago
:::::: branch date: 9 hours ago
:::::: commit date: 9 months ago
compiler: aarch64-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
cppcheck possible warnings: (new ones prefixed by >>, may not real problems)
>> arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
get_clidr_el1(NULL, &clidr); /* Ugly... */
^
>> arch/arm64/kvm/sys_regs.c:2787:17: warning: Uninitialized struct member: clidr.val [uninitStructMember]
cache_levels = clidr.val;
^
vim +2786 arch/arm64/kvm/sys_regs.c
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2758
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2759 void kvm_sys_reg_table_init(void)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2760 {
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2761 unsigned int i;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2762 struct sys_reg_desc clidr;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2763
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2764 /* Make sure tables are unique and in order. */
bb44a8dbea259b Marc Zyngier 2020-01-27 2765 BUG_ON(check_sysreg_table(sys_reg_descs, ARRAY_SIZE(sys_reg_descs), false));
bb44a8dbea259b Marc Zyngier 2020-01-27 2766 BUG_ON(check_sysreg_table(cp14_regs, ARRAY_SIZE(cp14_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2767 BUG_ON(check_sysreg_table(cp14_64_regs, ARRAY_SIZE(cp14_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2768 BUG_ON(check_sysreg_table(cp15_regs, ARRAY_SIZE(cp15_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2769 BUG_ON(check_sysreg_table(cp15_64_regs, ARRAY_SIZE(cp15_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2770 BUG_ON(check_sysreg_table(invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs), false));
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2771
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2772 /* We abuse the reset function to overwrite the table itself. */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2773 for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2774 invariant_sys_regs[i].reset(NULL, &invariant_sys_regs[i]);
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2775
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2776 /*
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2777 * CLIDR format is awkward, so clean it up. See ARM B4.1.20:
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2778 *
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2779 * If software reads the Cache Type fields from Ctype1
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2780 * upwards, once it has seen a value of 0b000, no caches
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2781 * exist at further-out levels of the hierarchy. So, for
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2782 * example, if Ctype3 is the first Cache Type field with a
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2783 * value of 0b000, the values of Ctype4 to Ctype7 must be
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2784 * ignored.
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2785 */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2786 get_clidr_el1(NULL, &clidr); /* Ugly... */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2787 cache_levels = clidr.val;
:::::: The code@line 2786 was first introduced by commit
:::::: 7c8c5e6a9101ea57a1c2c9faff0917e79251a21e arm64: KVM: system register handling
:::::: TO: Marc Zyngier <marc.zyngier@arm.com>
:::::: CC: Marc Zyngier <marc.zyngier@arm.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 4+ messages in thread* arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
@ 2021-12-14 8:15 kernel test robot
0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2021-12-14 8:15 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 4124 bytes --]
CC: kbuild-all(a)lists.01.org
CC: linux-kernel(a)vger.kernel.org
TO: Peter Zijlstra <peterz@infradead.org>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@kernel.org>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 5472f14a37421d1bca3dddf33cabd3bd6dbefbbc
commit: 63b3f96e1a989846a5a521d4fbef4bc86406929d kvm: Select SCHED_INFO instead of TASK_DELAY_ACCT
date: 7 months ago
:::::: branch date: 10 hours ago
:::::: commit date: 7 months ago
compiler: aarch64-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
cppcheck possible warnings: (new ones prefixed by >>, may not real problems)
>> arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
get_clidr_el1(NULL, &clidr); /* Ugly... */
^
>> arch/arm64/kvm/sys_regs.c:2787:17: warning: Uninitialized struct member: clidr.val [uninitStructMember]
cache_levels = clidr.val;
^
vim +2786 arch/arm64/kvm/sys_regs.c
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2758
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2759 void kvm_sys_reg_table_init(void)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2760 {
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2761 unsigned int i;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2762 struct sys_reg_desc clidr;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2763
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2764 /* Make sure tables are unique and in order. */
bb44a8dbea259b Marc Zyngier 2020-01-27 2765 BUG_ON(check_sysreg_table(sys_reg_descs, ARRAY_SIZE(sys_reg_descs), false));
bb44a8dbea259b Marc Zyngier 2020-01-27 2766 BUG_ON(check_sysreg_table(cp14_regs, ARRAY_SIZE(cp14_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2767 BUG_ON(check_sysreg_table(cp14_64_regs, ARRAY_SIZE(cp14_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2768 BUG_ON(check_sysreg_table(cp15_regs, ARRAY_SIZE(cp15_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2769 BUG_ON(check_sysreg_table(cp15_64_regs, ARRAY_SIZE(cp15_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2770 BUG_ON(check_sysreg_table(invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs), false));
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2771
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2772 /* We abuse the reset function to overwrite the table itself. */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2773 for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2774 invariant_sys_regs[i].reset(NULL, &invariant_sys_regs[i]);
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2775
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2776 /*
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2777 * CLIDR format is awkward, so clean it up. See ARM B4.1.20:
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2778 *
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2779 * If software reads the Cache Type fields from Ctype1
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2780 * upwards, once it has seen a value of 0b000, no caches
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2781 * exist at further-out levels of the hierarchy. So, for
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2782 * example, if Ctype3 is the first Cache Type field with a
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2783 * value of 0b000, the values of Ctype4 to Ctype7 must be
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2784 * ignored.
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2785 */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2786 get_clidr_el1(NULL, &clidr); /* Ugly... */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2787 cache_levels = clidr.val;
:::::: The code@line 2786 was first introduced by commit
:::::: 7c8c5e6a9101ea57a1c2c9faff0917e79251a21e arm64: KVM: system register handling
:::::: TO: Marc Zyngier <marc.zyngier@arm.com>
:::::: CC: Marc Zyngier <marc.zyngier@arm.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 4+ messages in thread* arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
@ 2021-11-12 22:27 kernel test robot
0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2021-11-12 22:27 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 4124 bytes --]
CC: kbuild-all(a)lists.01.org
CC: linux-kernel(a)vger.kernel.org
TO: Peter Zijlstra <peterz@infradead.org>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@kernel.org>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 5833291ab6de9c3e2374336b51c814e515e8f3a5
commit: 63b3f96e1a989846a5a521d4fbef4bc86406929d kvm: Select SCHED_INFO instead of TASK_DELAY_ACCT
date: 6 months ago
:::::: branch date: 23 hours ago
:::::: commit date: 6 months ago
compiler: aarch64-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
cppcheck possible warnings: (new ones prefixed by >>, may not real problems)
>> arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
get_clidr_el1(NULL, &clidr); /* Ugly... */
^
>> arch/arm64/kvm/sys_regs.c:2787:17: warning: Uninitialized struct member: clidr.val [uninitStructMember]
cache_levels = clidr.val;
^
vim +2786 arch/arm64/kvm/sys_regs.c
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2758
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2759 void kvm_sys_reg_table_init(void)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2760 {
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2761 unsigned int i;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2762 struct sys_reg_desc clidr;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2763
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2764 /* Make sure tables are unique and in order. */
bb44a8dbea259b Marc Zyngier 2020-01-27 2765 BUG_ON(check_sysreg_table(sys_reg_descs, ARRAY_SIZE(sys_reg_descs), false));
bb44a8dbea259b Marc Zyngier 2020-01-27 2766 BUG_ON(check_sysreg_table(cp14_regs, ARRAY_SIZE(cp14_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2767 BUG_ON(check_sysreg_table(cp14_64_regs, ARRAY_SIZE(cp14_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2768 BUG_ON(check_sysreg_table(cp15_regs, ARRAY_SIZE(cp15_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2769 BUG_ON(check_sysreg_table(cp15_64_regs, ARRAY_SIZE(cp15_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2770 BUG_ON(check_sysreg_table(invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs), false));
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2771
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2772 /* We abuse the reset function to overwrite the table itself. */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2773 for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2774 invariant_sys_regs[i].reset(NULL, &invariant_sys_regs[i]);
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2775
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2776 /*
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2777 * CLIDR format is awkward, so clean it up. See ARM B4.1.20:
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2778 *
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2779 * If software reads the Cache Type fields from Ctype1
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2780 * upwards, once it has seen a value of 0b000, no caches
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2781 * exist at further-out levels of the hierarchy. So, for
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2782 * example, if Ctype3 is the first Cache Type field with a
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2783 * value of 0b000, the values of Ctype4 to Ctype7 must be
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2784 * ignored.
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2785 */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2786 get_clidr_el1(NULL, &clidr); /* Ugly... */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2787 cache_levels = clidr.val;
:::::: The code@line 2786 was first introduced by commit
:::::: 7c8c5e6a9101ea57a1c2c9faff0917e79251a21e arm64: KVM: system register handling
:::::: TO: Marc Zyngier <marc.zyngier@arm.com>
:::::: CC: Marc Zyngier <marc.zyngier@arm.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 4+ messages in thread* arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
@ 2021-07-18 14:28 kernel test robot
0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2021-07-18 14:28 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 4124 bytes --]
CC: kbuild-all(a)lists.01.org
CC: linux-kernel(a)vger.kernel.org
TO: Peter Zijlstra <peterz@infradead.org>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@kernel.org>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 1d67c8d993baf8ab6be8a2154b1a94ec1311c869
commit: 63b3f96e1a989846a5a521d4fbef4bc86406929d kvm: Select SCHED_INFO instead of TASK_DELAY_ACCT
date: 10 weeks ago
:::::: branch date: 16 hours ago
:::::: commit date: 10 weeks ago
compiler: aarch64-linux-gcc (GCC) 10.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
cppcheck possible warnings: (new ones prefixed by >>, may not real problems)
>> arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar]
get_clidr_el1(NULL, &clidr); /* Ugly... */
^
>> arch/arm64/kvm/sys_regs.c:2787:17: warning: Uninitialized struct member: clidr.val [uninitStructMember]
cache_levels = clidr.val;
^
vim +2786 arch/arm64/kvm/sys_regs.c
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2758
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2759 void kvm_sys_reg_table_init(void)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2760 {
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2761 unsigned int i;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2762 struct sys_reg_desc clidr;
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2763
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2764 /* Make sure tables are unique and in order. */
bb44a8dbea259b Marc Zyngier 2020-01-27 2765 BUG_ON(check_sysreg_table(sys_reg_descs, ARRAY_SIZE(sys_reg_descs), false));
bb44a8dbea259b Marc Zyngier 2020-01-27 2766 BUG_ON(check_sysreg_table(cp14_regs, ARRAY_SIZE(cp14_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2767 BUG_ON(check_sysreg_table(cp14_64_regs, ARRAY_SIZE(cp14_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2768 BUG_ON(check_sysreg_table(cp15_regs, ARRAY_SIZE(cp15_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2769 BUG_ON(check_sysreg_table(cp15_64_regs, ARRAY_SIZE(cp15_64_regs), true));
bb44a8dbea259b Marc Zyngier 2020-01-27 2770 BUG_ON(check_sysreg_table(invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs), false));
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2771
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2772 /* We abuse the reset function to overwrite the table itself. */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2773 for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2774 invariant_sys_regs[i].reset(NULL, &invariant_sys_regs[i]);
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2775
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2776 /*
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2777 * CLIDR format is awkward, so clean it up. See ARM B4.1.20:
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2778 *
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2779 * If software reads the Cache Type fields from Ctype1
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2780 * upwards, once it has seen a value of 0b000, no caches
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2781 * exist at further-out levels of the hierarchy. So, for
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2782 * example, if Ctype3 is the first Cache Type field with a
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2783 * value of 0b000, the values of Ctype4 to Ctype7 must be
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2784 * ignored.
7c8c5e6a9101ea Marc Zyngier 2012-12-10 2785 */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2786 get_clidr_el1(NULL, &clidr); /* Ugly... */
7c8c5e6a9101ea Marc Zyngier 2012-12-10 @2787 cache_levels = clidr.val;
:::::: The code@line 2786 was first introduced by commit
:::::: 7c8c5e6a9101ea57a1c2c9faff0917e79251a21e arm64: KVM: system register handling
:::::: TO: Marc Zyngier <marc.zyngier@arm.com>
:::::: CC: Marc Zyngier <marc.zyngier@arm.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-01-28 3:58 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-01-28 3:58 arch/arm64/kvm/sys_regs.c:2786:23: warning: Uninitialized variable: clidr [uninitvar] kernel test robot
-- strict thread matches above, loose matches on Subject: below --
2021-12-14 8:15 kernel test robot
2021-11-12 22:27 kernel test robot
2021-07-18 14:28 kernel test robot
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.