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From: guoren@kernel.org
To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de,
	anup@brainfault.org, gregkh@linuxfoundation.org,
	liush@allwinnertech.com, wefu@redhat.com, drew@beagleboard.org,
	wangjunqiang@iscas.ac.cn, hch@lst.de, hch@infradead.org
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org,
	linux-s390@vger.kernel.org, sparclinux@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-parisc@vger.kernel.org,
	linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	x86@kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH V4 11/17] riscv: compat: Add elf.h implementation
Date: Sat, 29 Jan 2022 20:17:22 +0800	[thread overview]
Message-ID: <20220129121728.1079364-12-guoren@kernel.org> (raw)
In-Reply-To: <20220129121728.1079364-1-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

Implement necessary type and macro for compat elf. See the code
comment for detail.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/riscv/include/asm/elf.h | 48 +++++++++++++++++++++++++++++++++++-
 1 file changed, 47 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index f53c40026c7a..c1fc31629d40 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -8,6 +8,8 @@
 #ifndef _ASM_RISCV_ELF_H
 #define _ASM_RISCV_ELF_H
 
+#include <uapi/linux/elf.h>
+#include <linux/compat.h>
 #include <uapi/asm/elf.h>
 #include <asm/auxvec.h>
 #include <asm/byteorder.h>
@@ -18,11 +20,13 @@
  */
 #define ELF_ARCH	EM_RISCV
 
+#ifndef ELF_CLASS
 #ifdef CONFIG_64BIT
 #define ELF_CLASS	ELFCLASS64
 #else
 #define ELF_CLASS	ELFCLASS32
 #endif
+#endif
 
 #define ELF_DATA	ELFDATA2LSB
 
@@ -31,6 +35,15 @@
  */
 #define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
 
+#ifdef CONFIG_COMPAT
+/*
+ * Use the same code with elf_check_arch, because elf32_hdr &
+ * elf64_hdr e_machine's offset are different. The checker is
+ * a little bit simple compare to other architectures.
+ */
+#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+#endif
+
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE	(PAGE_SIZE)
 
@@ -43,8 +56,14 @@
 #define ELF_ET_DYN_BASE		((TASK_SIZE / 3) * 2)
 
 #ifdef CONFIG_64BIT
+#ifdef CONFIG_COMPAT
+#define STACK_RND_MASK		(test_thread_flag(TIF_32BIT) ? \
+				 0x7ff >> (PAGE_SHIFT - 12) : \
+				 0x3ffff >> (PAGE_SHIFT - 12))
+#else
 #define STACK_RND_MASK		(0x3ffff >> (PAGE_SHIFT - 12))
 #endif
+#endif
 /*
  * This yields a mask that user programs can use to figure out what
  * instruction set this CPU supports.  This could be done in user space,
@@ -60,11 +79,19 @@ extern unsigned long elf_hwcap;
  */
 #define ELF_PLATFORM	(NULL)
 
+#define COMPAT_ELF_PLATFORM	(NULL)
+
 #ifdef CONFIG_MMU
 #define ARCH_DLINFO						\
 do {								\
+	/*							\
+	 * Note that we add ulong after elf_addr_t because	\
+	 * casting current->mm->context.vdso triggers a cast	\
+	 * warning of cast from pointer to integer for		\
+	 * COMPAT ELFCLASS32.					\
+	 */							\
 	NEW_AUX_ENT(AT_SYSINFO_EHDR,				\
-		(elf_addr_t)current->mm->context.vdso);		\
+		(elf_addr_t)(ulong)current->mm->context.vdso);	\
 	NEW_AUX_ENT(AT_L1I_CACHESIZE,				\
 		get_cache_size(1, CACHE_TYPE_INST));		\
 	NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY,			\
@@ -90,4 +117,23 @@ do {							\
 		*(struct user_regs_struct *)regs;	\
 } while (0);
 
+#ifdef CONFIG_COMPAT
+
+#define SET_PERSONALITY(ex)					\
+do {    if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
+		set_thread_flag(TIF_32BIT);			\
+	else							\
+		clear_thread_flag(TIF_32BIT);			\
+	if (personality(current->personality) != PER_LINUX32)	\
+		set_personality(PER_LINUX |			\
+			(current->personality & (~PER_MASK)));	\
+} while (0)
+
+#define COMPAT_ELF_ET_DYN_BASE		((TASK_SIZE_32 / 3) * 2)
+
+/* rv32 registers */
+typedef compat_ulong_t			compat_elf_greg_t;
+typedef compat_elf_greg_t		compat_elf_gregset_t[ELF_NGREG];
+
+#endif /* CONFIG_COMPAT */
 #endif /* _ASM_RISCV_ELF_H */
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: guoren@kernel.org
To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de,
	anup@brainfault.org, gregkh@linuxfoundation.org,
	liush@allwinnertech.com, wefu@redhat.com, drew@beagleboard.org,
	wangjunqiang@iscas.ac.cn, hch@lst.de, hch@infradead.org
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org,
	linux-s390@vger.kernel.org, sparclinux@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-parisc@vger.kernel.org,
	linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	x86@kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH V4 11/17] riscv: compat: Add elf.h implementation
Date: Sat, 29 Jan 2022 20:17:22 +0800	[thread overview]
Message-ID: <20220129121728.1079364-12-guoren@kernel.org> (raw)
In-Reply-To: <20220129121728.1079364-1-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

Implement necessary type and macro for compat elf. See the code
comment for detail.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/riscv/include/asm/elf.h | 48 +++++++++++++++++++++++++++++++++++-
 1 file changed, 47 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index f53c40026c7a..c1fc31629d40 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -8,6 +8,8 @@
 #ifndef _ASM_RISCV_ELF_H
 #define _ASM_RISCV_ELF_H
 
+#include <uapi/linux/elf.h>
+#include <linux/compat.h>
 #include <uapi/asm/elf.h>
 #include <asm/auxvec.h>
 #include <asm/byteorder.h>
@@ -18,11 +20,13 @@
  */
 #define ELF_ARCH	EM_RISCV
 
+#ifndef ELF_CLASS
 #ifdef CONFIG_64BIT
 #define ELF_CLASS	ELFCLASS64
 #else
 #define ELF_CLASS	ELFCLASS32
 #endif
+#endif
 
 #define ELF_DATA	ELFDATA2LSB
 
@@ -31,6 +35,15 @@
  */
 #define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
 
+#ifdef CONFIG_COMPAT
+/*
+ * Use the same code with elf_check_arch, because elf32_hdr &
+ * elf64_hdr e_machine's offset are different. The checker is
+ * a little bit simple compare to other architectures.
+ */
+#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+#endif
+
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE	(PAGE_SIZE)
 
@@ -43,8 +56,14 @@
 #define ELF_ET_DYN_BASE		((TASK_SIZE / 3) * 2)
 
 #ifdef CONFIG_64BIT
+#ifdef CONFIG_COMPAT
+#define STACK_RND_MASK		(test_thread_flag(TIF_32BIT) ? \
+				 0x7ff >> (PAGE_SHIFT - 12) : \
+				 0x3ffff >> (PAGE_SHIFT - 12))
+#else
 #define STACK_RND_MASK		(0x3ffff >> (PAGE_SHIFT - 12))
 #endif
+#endif
 /*
  * This yields a mask that user programs can use to figure out what
  * instruction set this CPU supports.  This could be done in user space,
@@ -60,11 +79,19 @@ extern unsigned long elf_hwcap;
  */
 #define ELF_PLATFORM	(NULL)
 
+#define COMPAT_ELF_PLATFORM	(NULL)
+
 #ifdef CONFIG_MMU
 #define ARCH_DLINFO						\
 do {								\
+	/*							\
+	 * Note that we add ulong after elf_addr_t because	\
+	 * casting current->mm->context.vdso triggers a cast	\
+	 * warning of cast from pointer to integer for		\
+	 * COMPAT ELFCLASS32.					\
+	 */							\
 	NEW_AUX_ENT(AT_SYSINFO_EHDR,				\
-		(elf_addr_t)current->mm->context.vdso);		\
+		(elf_addr_t)(ulong)current->mm->context.vdso);	\
 	NEW_AUX_ENT(AT_L1I_CACHESIZE,				\
 		get_cache_size(1, CACHE_TYPE_INST));		\
 	NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY,			\
@@ -90,4 +117,23 @@ do {							\
 		*(struct user_regs_struct *)regs;	\
 } while (0);
 
+#ifdef CONFIG_COMPAT
+
+#define SET_PERSONALITY(ex)					\
+do {    if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
+		set_thread_flag(TIF_32BIT);			\
+	else							\
+		clear_thread_flag(TIF_32BIT);			\
+	if (personality(current->personality) != PER_LINUX32)	\
+		set_personality(PER_LINUX |			\
+			(current->personality & (~PER_MASK)));	\
+} while (0)
+
+#define COMPAT_ELF_ET_DYN_BASE		((TASK_SIZE_32 / 3) * 2)
+
+/* rv32 registers */
+typedef compat_ulong_t			compat_elf_greg_t;
+typedef compat_elf_greg_t		compat_elf_gregset_t[ELF_NGREG];
+
+#endif /* CONFIG_COMPAT */
 #endif /* _ASM_RISCV_ELF_H */
-- 
2.25.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: guoren@kernel.org
To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de,
	anup@brainfault.org, gregkh@linuxfoundation.org,
	liush@allwinnertech.com, wefu@redhat.com, drew@beagleboard.org,
	wangjunqiang@iscas.ac.cn, hch@lst.de, hch@infradead.org
Cc: linux-arch@vger.kernel.org, linux-s390@vger.kernel.org,
	Guo Ren <guoren@linux.alibaba.com>,
	linux-parisc@vger.kernel.org, x86@kernel.org,
	linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org,
	linux-mips@vger.kernel.org, sparclinux@vger.kernel.org,
	linux-riscv@lists.infradead.org, linuxppc-dev@lists.ozlabs.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH V4 11/17] riscv: compat: Add elf.h implementation
Date: Sat, 29 Jan 2022 20:17:22 +0800	[thread overview]
Message-ID: <20220129121728.1079364-12-guoren@kernel.org> (raw)
In-Reply-To: <20220129121728.1079364-1-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

Implement necessary type and macro for compat elf. See the code
comment for detail.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/riscv/include/asm/elf.h | 48 +++++++++++++++++++++++++++++++++++-
 1 file changed, 47 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index f53c40026c7a..c1fc31629d40 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -8,6 +8,8 @@
 #ifndef _ASM_RISCV_ELF_H
 #define _ASM_RISCV_ELF_H
 
+#include <uapi/linux/elf.h>
+#include <linux/compat.h>
 #include <uapi/asm/elf.h>
 #include <asm/auxvec.h>
 #include <asm/byteorder.h>
@@ -18,11 +20,13 @@
  */
 #define ELF_ARCH	EM_RISCV
 
+#ifndef ELF_CLASS
 #ifdef CONFIG_64BIT
 #define ELF_CLASS	ELFCLASS64
 #else
 #define ELF_CLASS	ELFCLASS32
 #endif
+#endif
 
 #define ELF_DATA	ELFDATA2LSB
 
@@ -31,6 +35,15 @@
  */
 #define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
 
+#ifdef CONFIG_COMPAT
+/*
+ * Use the same code with elf_check_arch, because elf32_hdr &
+ * elf64_hdr e_machine's offset are different. The checker is
+ * a little bit simple compare to other architectures.
+ */
+#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+#endif
+
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE	(PAGE_SIZE)
 
@@ -43,8 +56,14 @@
 #define ELF_ET_DYN_BASE		((TASK_SIZE / 3) * 2)
 
 #ifdef CONFIG_64BIT
+#ifdef CONFIG_COMPAT
+#define STACK_RND_MASK		(test_thread_flag(TIF_32BIT) ? \
+				 0x7ff >> (PAGE_SHIFT - 12) : \
+				 0x3ffff >> (PAGE_SHIFT - 12))
+#else
 #define STACK_RND_MASK		(0x3ffff >> (PAGE_SHIFT - 12))
 #endif
+#endif
 /*
  * This yields a mask that user programs can use to figure out what
  * instruction set this CPU supports.  This could be done in user space,
@@ -60,11 +79,19 @@ extern unsigned long elf_hwcap;
  */
 #define ELF_PLATFORM	(NULL)
 
+#define COMPAT_ELF_PLATFORM	(NULL)
+
 #ifdef CONFIG_MMU
 #define ARCH_DLINFO						\
 do {								\
+	/*							\
+	 * Note that we add ulong after elf_addr_t because	\
+	 * casting current->mm->context.vdso triggers a cast	\
+	 * warning of cast from pointer to integer for		\
+	 * COMPAT ELFCLASS32.					\
+	 */							\
 	NEW_AUX_ENT(AT_SYSINFO_EHDR,				\
-		(elf_addr_t)current->mm->context.vdso);		\
+		(elf_addr_t)(ulong)current->mm->context.vdso);	\
 	NEW_AUX_ENT(AT_L1I_CACHESIZE,				\
 		get_cache_size(1, CACHE_TYPE_INST));		\
 	NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY,			\
@@ -90,4 +117,23 @@ do {							\
 		*(struct user_regs_struct *)regs;	\
 } while (0);
 
+#ifdef CONFIG_COMPAT
+
+#define SET_PERSONALITY(ex)					\
+do {    if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
+		set_thread_flag(TIF_32BIT);			\
+	else							\
+		clear_thread_flag(TIF_32BIT);			\
+	if (personality(current->personality) != PER_LINUX32)	\
+		set_personality(PER_LINUX |			\
+			(current->personality & (~PER_MASK)));	\
+} while (0)
+
+#define COMPAT_ELF_ET_DYN_BASE		((TASK_SIZE_32 / 3) * 2)
+
+/* rv32 registers */
+typedef compat_ulong_t			compat_elf_greg_t;
+typedef compat_elf_greg_t		compat_elf_gregset_t[ELF_NGREG];
+
+#endif /* CONFIG_COMPAT */
 #endif /* _ASM_RISCV_ELF_H */
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: guoren@kernel.org
To: guoren@kernel.org, palmer@dabbelt.com, arnd@arndb.de,
	anup@brainfault.org, gregkh@linuxfoundation.org,
	liush@allwinnertech.com, wefu@redhat.com, drew@beagleboard.org,
	wangjunqiang@iscas.ac.cn, hch@lst.de, hch@infradead.org
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-csky@vger.kernel.org,
	linux-s390@vger.kernel.org, sparclinux@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-parisc@vger.kernel.org,
	linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	x86@kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH V4 11/17] riscv: compat: Add elf.h implementation
Date: Sat, 29 Jan 2022 20:17:22 +0800	[thread overview]
Message-ID: <20220129121728.1079364-12-guoren@kernel.org> (raw)
In-Reply-To: <20220129121728.1079364-1-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

Implement necessary type and macro for compat elf. See the code
comment for detail.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/riscv/include/asm/elf.h | 48 +++++++++++++++++++++++++++++++++++-
 1 file changed, 47 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index f53c40026c7a..c1fc31629d40 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -8,6 +8,8 @@
 #ifndef _ASM_RISCV_ELF_H
 #define _ASM_RISCV_ELF_H
 
+#include <uapi/linux/elf.h>
+#include <linux/compat.h>
 #include <uapi/asm/elf.h>
 #include <asm/auxvec.h>
 #include <asm/byteorder.h>
@@ -18,11 +20,13 @@
  */
 #define ELF_ARCH	EM_RISCV
 
+#ifndef ELF_CLASS
 #ifdef CONFIG_64BIT
 #define ELF_CLASS	ELFCLASS64
 #else
 #define ELF_CLASS	ELFCLASS32
 #endif
+#endif
 
 #define ELF_DATA	ELFDATA2LSB
 
@@ -31,6 +35,15 @@
  */
 #define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
 
+#ifdef CONFIG_COMPAT
+/*
+ * Use the same code with elf_check_arch, because elf32_hdr &
+ * elf64_hdr e_machine's offset are different. The checker is
+ * a little bit simple compare to other architectures.
+ */
+#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+#endif
+
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE	(PAGE_SIZE)
 
@@ -43,8 +56,14 @@
 #define ELF_ET_DYN_BASE		((TASK_SIZE / 3) * 2)
 
 #ifdef CONFIG_64BIT
+#ifdef CONFIG_COMPAT
+#define STACK_RND_MASK		(test_thread_flag(TIF_32BIT) ? \
+				 0x7ff >> (PAGE_SHIFT - 12) : \
+				 0x3ffff >> (PAGE_SHIFT - 12))
+#else
 #define STACK_RND_MASK		(0x3ffff >> (PAGE_SHIFT - 12))
 #endif
+#endif
 /*
  * This yields a mask that user programs can use to figure out what
  * instruction set this CPU supports.  This could be done in user space,
@@ -60,11 +79,19 @@ extern unsigned long elf_hwcap;
  */
 #define ELF_PLATFORM	(NULL)
 
+#define COMPAT_ELF_PLATFORM	(NULL)
+
 #ifdef CONFIG_MMU
 #define ARCH_DLINFO						\
 do {								\
+	/*							\
+	 * Note that we add ulong after elf_addr_t because	\
+	 * casting current->mm->context.vdso triggers a cast	\
+	 * warning of cast from pointer to integer for		\
+	 * COMPAT ELFCLASS32.					\
+	 */							\
 	NEW_AUX_ENT(AT_SYSINFO_EHDR,				\
-		(elf_addr_t)current->mm->context.vdso);		\
+		(elf_addr_t)(ulong)current->mm->context.vdso);	\
 	NEW_AUX_ENT(AT_L1I_CACHESIZE,				\
 		get_cache_size(1, CACHE_TYPE_INST));		\
 	NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY,			\
@@ -90,4 +117,23 @@ do {							\
 		*(struct user_regs_struct *)regs;	\
 } while (0);
 
+#ifdef CONFIG_COMPAT
+
+#define SET_PERSONALITY(ex)					\
+do {    if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
+		set_thread_flag(TIF_32BIT);			\
+	else							\
+		clear_thread_flag(TIF_32BIT);			\
+	if (personality(current->personality) != PER_LINUX32)	\
+		set_personality(PER_LINUX |			\
+			(current->personality & (~PER_MASK)));	\
+} while (0)
+
+#define COMPAT_ELF_ET_DYN_BASE		((TASK_SIZE_32 / 3) * 2)
+
+/* rv32 registers */
+typedef compat_ulong_t			compat_elf_greg_t;
+typedef compat_elf_greg_t		compat_elf_gregset_t[ELF_NGREG];
+
+#endif /* CONFIG_COMPAT */
 #endif /* _ASM_RISCV_ELF_H */
-- 
2.25.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-01-29 12:19 UTC|newest]

Thread overview: 172+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-29 12:17 [PATCH V4 00/17] riscv: compat: Add COMPAT mode support for rv64 guoren
2022-01-29 12:17 ` guoren
2022-01-29 12:17 ` guoren
2022-01-29 12:17 ` guoren
2022-01-29 12:17 ` [PATCH V4 01/17] kconfig: Add SYSVIPC_COMPAT for all architectures guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-31 12:19   ` Christoph Hellwig
2022-01-31 12:19     ` Christoph Hellwig
2022-01-31 12:19     ` Christoph Hellwig
2022-01-31 12:19     ` Christoph Hellwig
2022-01-29 12:17 ` [PATCH V4 02/17] fs: stat: compat: Add __ARCH_WANT_COMPAT_STAT guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-31 12:19   ` Christoph Hellwig
2022-01-31 12:19     ` Christoph Hellwig
2022-01-31 12:19     ` Christoph Hellwig
2022-01-31 12:19     ` Christoph Hellwig
2022-01-29 12:17 ` [PATCH V4 03/17] asm-generic: compat: Cleanup duplicate definitions guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 21:40   ` Arnd Bergmann
2022-01-29 21:40     ` Arnd Bergmann
2022-01-29 21:40     ` Arnd Bergmann
2022-01-29 21:40     ` Arnd Bergmann
2022-01-31 12:21   ` Christoph Hellwig
2022-01-31 12:21     ` Christoph Hellwig
2022-01-31 12:21     ` Christoph Hellwig
2022-01-31 12:21     ` Christoph Hellwig
2022-01-31 13:52     ` Guo Ren
2022-01-31 13:52       ` Guo Ren
2022-01-31 13:52       ` Guo Ren
2022-01-31 13:52       ` Guo Ren
2022-01-29 12:17 ` [PATCH V4 04/17] syscalls: compat: Fix the missing part for __SYSCALL_COMPAT guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-31 12:21   ` Christoph Hellwig
2022-01-31 12:21     ` Christoph Hellwig
2022-01-31 12:21     ` Christoph Hellwig
2022-01-31 12:21     ` Christoph Hellwig
2022-01-29 12:17 ` [PATCH V4 05/17] riscv: Fixup difference with defconfig guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-31 12:23   ` Christoph Hellwig
2022-01-31 12:23     ` Christoph Hellwig
2022-01-31 12:23     ` Christoph Hellwig
2022-01-31 12:23     ` Christoph Hellwig
2022-01-31 12:48     ` Arnd Bergmann
2022-01-31 12:48       ` Arnd Bergmann
2022-01-31 12:48       ` Arnd Bergmann
2022-01-31 12:48       ` Arnd Bergmann
2022-01-31 13:00       ` Christoph Hellwig
2022-01-31 13:00         ` Christoph Hellwig
2022-01-31 13:00         ` Christoph Hellwig
2022-01-31 13:00         ` Christoph Hellwig
2022-01-31 13:19         ` Arnd Bergmann
2022-01-31 13:19           ` Arnd Bergmann
2022-01-31 13:19           ` Arnd Bergmann
2022-01-31 13:19           ` Arnd Bergmann
2022-01-29 12:17 ` [PATCH V4 06/17] riscv: compat: Add basic compat date type implementation guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 21:56   ` Arnd Bergmann
2022-01-29 21:56     ` Arnd Bergmann
2022-01-29 21:56     ` Arnd Bergmann
2022-01-29 21:56     ` Arnd Bergmann
2022-01-30  5:47     ` Guo Ren
2022-01-30  5:47       ` Guo Ren
2022-01-30  5:47       ` Guo Ren
2022-01-30  5:47       ` Guo Ren
2022-01-30 11:36       ` Arnd Bergmann
2022-01-30 11:36         ` Arnd Bergmann
2022-01-30 11:36         ` Arnd Bergmann
2022-01-30 11:36         ` Arnd Bergmann
2022-01-29 12:17 ` [PATCH V4 07/17] riscv: compat: Re-implement TASK_SIZE for COMPAT_32BIT guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` [PATCH V4 08/17] riscv: compat: syscall: Add compat_sys_call_table implementation guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 22:12   ` Arnd Bergmann
2022-01-29 22:12     ` Arnd Bergmann
2022-01-29 22:12     ` Arnd Bergmann
2022-01-29 22:12     ` Arnd Bergmann
2022-01-30  5:54     ` Guo Ren
2022-01-30  5:54       ` Guo Ren
2022-01-30  5:54       ` Guo Ren
2022-01-30  5:54       ` Guo Ren
2022-01-30 11:32       ` Arnd Bergmann
2022-01-30 11:32         ` Arnd Bergmann
2022-01-30 11:32         ` Arnd Bergmann
2022-01-30 11:32         ` Arnd Bergmann
2022-01-30 14:57         ` Guo Ren
2022-01-30 14:57           ` Guo Ren
2022-01-30 14:57           ` Guo Ren
2022-01-30 14:57           ` Guo Ren
2022-01-29 12:17 ` [PATCH V4 09/17] riscv: compat: syscall: Add entry.S implementation guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` [PATCH V4 10/17] riscv: compat: process: Add UXL_32 support in start_thread guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` guoren [this message]
2022-01-29 12:17   ` [PATCH V4 11/17] riscv: compat: Add elf.h implementation guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` [PATCH V4 12/17] riscv: compat: vdso: Add rv32 VDSO base code implementation guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` [PATCH V4 13/17] riscv: compat: vdso: Add setup additional pages implementation guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` [PATCH V4 14/17] riscv: compat: signal: Add rt_frame implementation guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` [PATCH V4 15/17] riscv: compat: ptrace: Add compat_arch_ptrace implement guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17 ` [PATCH V4 16/17] riscv: compat: Add COMPAT Kbuild skeletal support guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-31 12:26   ` Christoph Hellwig
2022-01-31 12:26     ` Christoph Hellwig
2022-01-31 12:26     ` Christoph Hellwig
2022-01-31 12:26     ` Christoph Hellwig
2022-01-31 13:50     ` Guo Ren
2022-01-31 13:50       ` Guo Ren
2022-01-31 13:50       ` Guo Ren
2022-01-31 13:50       ` Guo Ren
2022-02-01  7:44       ` Christoph Hellwig
2022-02-01  7:44         ` Christoph Hellwig
2022-02-01  7:44         ` Christoph Hellwig
2022-02-01  7:44         ` Christoph Hellwig
2022-02-01  9:13         ` Guo Ren
2022-02-01  9:13           ` Guo Ren
2022-02-01  9:13           ` Guo Ren
2022-02-01  9:13           ` Guo Ren
2022-02-01  9:36           ` Arnd Bergmann
2022-02-01  9:36             ` Arnd Bergmann
2022-02-01  9:36             ` Arnd Bergmann
2022-02-01  9:36             ` Arnd Bergmann
2022-02-01 10:26             ` Guo Ren
2022-02-01 10:26               ` Guo Ren
2022-02-01 10:26               ` Guo Ren
2022-02-01 10:26               ` Guo Ren
2022-02-01 11:48               ` Arnd Bergmann
2022-02-01 11:48                 ` Arnd Bergmann
2022-02-01 11:48                 ` Arnd Bergmann
2022-02-01 11:48                 ` Arnd Bergmann
2022-02-01 13:56                 ` Guo Ren
2022-02-01 13:56                   ` Guo Ren
2022-02-01 13:56                   ` Guo Ren
2022-02-01 13:56                   ` Guo Ren
2022-01-29 12:17 ` [PATCH V4 17/17] KVM: compat: riscv: Prevent KVM_COMPAT from being selected guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren
2022-01-29 12:17   ` guoren

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