All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tony Luck <tony.luck@intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Smita Koralahalli Channabasappa
	<smita.koralahallichannabasappa@amd.com>,
	Wei Huang <wei.huang2@amd.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	patches@lists.linux.dev, Tony Luck <tony.luck@intel.com>
Subject: [PATCH v3 0/5] PPIN (Protected Processor Inventory Number) updates
Date: Mon, 31 Jan 2022 15:01:06 -0800	[thread overview]
Message-ID: <20220131230111.2004669-1-tony.luck@intel.com> (raw)
In-Reply-To: <20220121174743.1875294-1-tony.luck@intel.com>

The series starts out with two changes that I expect are uncontroversial.
Later parts get progressively more "RFC" - but seem to have survived
discussions on LKML.

1) Simple cleanup to merge Intel and AMD duplicated code to test for
   presence of PPIN and check whether it is enabled.

2) Long overdue update from Intel to enumerate the PPIN and PPIN_CTL
   MSRs. See the December 2021 Software Developers Manual

3) Code to scan machine check banks re-reads the PPIN every time banks
   are scanned (whether for a machine check, a CMCI, or just a periodic
   poll). Since PPIN never changes, this seems like unnecessary overhead.
   Read the MSR once (per CPU) and save to memory.

4) Refactor as prep for last part.

5) Add "ppin" to /sys/devices/system/cpu/cpu*/topology/ppin

Use case: ppin is already useful when reporting machine check
errors. Patches for new "in field scan" tests will appear soon.
If a CPU fails such a test it will be useful to provide the ppin
along with the test failure data.

Changes since V2:
----------------
1) Part 1 of V2 (adding ICELAKE_D) merged upstream, so dropped here

2) Rebased to v5.17-rc2 (to build on top of that merged patch)

3) Fixed bisection breakage reported by Boris where .msr_ppin
   structure fields were initialized two patches before the
   field was added.

4) Add Ack's from GregKH to parts 4 & 5

Tony Luck (5):
  x86/cpu: Merge Intel and AMD ppin_init() functions
  x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit
  x86/cpu: Read/save PPIN MSR during initialization
  topology/sysfs: Add format parameter to macro defining "show"
    functions for proc
  topology/sysfs: Add PPIN in sysfs under cpu topology

 .../ABI/stable/sysfs-devices-system-cpu       |  4 +
 .../ABI/testing/sysfs-devices-system-cpu      |  6 ++
 arch/x86/include/asm/processor.h              |  2 +
 arch/x86/include/asm/topology.h               |  1 +
 arch/x86/kernel/cpu/amd.c                     | 30 -------
 arch/x86/kernel/cpu/common.c                  | 79 +++++++++++++++++++
 arch/x86/kernel/cpu/mce/core.c                |  7 +-
 arch/x86/kernel/cpu/mce/intel.c               | 42 ----------
 arch/x86/kernel/cpu/scattered.c               |  1 +
 drivers/base/topology.c                       | 20 +++--
 include/linux/topology.h                      |  3 +
 11 files changed, 109 insertions(+), 86 deletions(-)


base-commit: 26291c54e111ff6ba87a164d85d4a4e134b7315c
-- 
2.31.1


  parent reply	other threads:[~2022-01-31 23:01 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-07 22:54 [PATCH 0/5] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-07 22:54 ` [PATCH 1/5] x86/ras: Merge Intel and AMD ppin_init() functions Tony Luck
2022-01-18 20:02   ` Borislav Petkov
2022-01-18 21:03     ` Luck, Tony
2022-01-18 21:15       ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 2/5] x86/ras: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-01-20 13:32   ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 3/5] x86/ras: Read/save PPIN MSR during initialization Tony Luck
2022-01-07 22:54 ` [PATCH 4/5] x86/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-01-20 13:32   ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 5/5] x86/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-01-20 13:35   ` Borislav Petkov
2022-01-20 18:01     ` Luck, Tony
2022-01-20 22:48       ` Borislav Petkov
2022-01-21 17:47 ` [PATCH v2 0/6] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-21 17:47   ` [PATCH v2 1/6] x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN Tony Luck
2022-01-25 17:55     ` [tip: x86/urgent] " tip-bot2 for Tony Luck
2022-01-21 17:47   ` [PATCH v2 2/6] x86/cpu: Merge Intel and AMD ppin_init() functions Tony Luck
2022-01-27 10:22     ` Borislav Petkov
2022-01-27 16:52       ` Luck, Tony
2022-01-21 17:47   ` [PATCH v2 3/6] x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-01-21 17:47   ` [PATCH v2 4/6] x86/cpu: Read/save PPIN MSR during initialization Tony Luck
2022-01-21 17:47   ` [PATCH v2 5/6] topology/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-01-31 11:34     ` Greg Kroah-Hartman
2022-01-21 17:47   ` [PATCH v2 6/6] topology/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-01-31 11:35     ` Greg Kroah-Hartman
2022-01-31 12:31   ` [PATCH v2 0/6] PPIN (Protected Processor Inventory Number) updates Borislav Petkov
2022-01-31 17:23     ` Luck, Tony
2022-01-31 18:18       ` Borislav Petkov
2022-01-31 18:49         ` Luck, Tony
2022-01-31 19:10           ` Borislav Petkov
2022-01-31 19:29             ` Luck, Tony
2022-01-31 21:58               ` Borislav Petkov
2022-01-31 22:03                 ` Luck, Tony
2022-04-06 22:01                 ` [PATCH] topology/sysfs: Hide PPIN on systems that do not support it Tony Luck
2022-04-25 22:46                   ` Andrew Morton
2022-04-25 22:56                     ` Luck, Tony
2022-01-31 23:01   ` Tony Luck [this message]
2022-01-31 23:01     ` [PATCH v3 1/5] x86/cpu: Merge Intel and AMD ppin_init() functions Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 2/5] x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 3/5] x86/cpu: Read/save PPIN MSR during initialization Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 4/5] topology/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 5/5] topology/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220131230111.2004669-1-tony.luck@intel.com \
    --to=tony.luck@intel.com \
    --cc=bp@alien8.de \
    --cc=gregkh@linuxfoundation.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=patches@lists.linux.dev \
    --cc=smita.koralahallichannabasappa@amd.com \
    --cc=thomas.lendacky@amd.com \
    --cc=wei.huang2@amd.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.