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From: Borislav Petkov <bp@alien8.de>
To: Tony Luck <tony.luck@intel.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Smita Koralahalli Channabasappa
	<smita.koralahallichannabasappa@amd.com>,
	Wei Huang <wei.huang2@amd.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	patches@lists.linux.dev
Subject: Re: [PATCH 5/5] x86/sysfs: Add PPIN in sysfs under cpu topology
Date: Thu, 20 Jan 2022 14:35:51 +0100	[thread overview]
Message-ID: <YellN/3VCasDI3OD@zn.tnic> (raw)
In-Reply-To: <20220107225442.1690165-6-tony.luck@intel.com>

On Fri, Jan 07, 2022 at 02:54:42PM -0800, Tony Luck wrote:
> PPIN is the Protected Processor Identification Number.
> This is used to identify the socket as a Field Replaceable Unit (FRU).
> 
> Existing code only displays this when reporting errors. But this makes
> it inconvenient for large clusters to use it for its intended purpose
> of inventory control.

Do you have any concrete use cases you can cite here or this is one of
those: "let's make it available and see who'll use it" thing?

Because defeaturing a user-visible thing later is always a pain.

> There are several privacy concerns associated with a unique
> platform identifier. But making the PPIN available shouldn't
> change anything important. Notes:
> 
> 1) The PPIN is only enabled on server CPUs (E.g. Intel Xeon
> "-E5", "-E7" and "-SP" parts).

Can't use that as an argument - that can easily change in the future.

> 2) The PPIN MSR is may be implemented on some desktop/laptop parts.

s/is //

> But this is for OEM inventory control. Production BIOS versions
> leave the PPIN_CTL MSR in the "locked disabled" mode.

That either. Never let the BIOS do your work for you. :-)

> 3) There may be a BIOS option to lock the MSR in disabled mode
> to prevent Linux from reading it.
> 
> 4) The /sys file added here is readable only by "root".

Yap, that's the argument: your patch simply makes what is already
accessible to root through rdmsr in a more user-friendly way.

> Signed-off-by: Tony Luck <tony.luck@intel.com>
> ---
>  Documentation/ABI/stable/sysfs-devices-system-cpu  | 4 ++++
>  Documentation/ABI/testing/sysfs-devices-system-cpu | 6 ++++++
>  arch/x86/include/asm/topology.h                    | 1 +
>  drivers/base/topology.c                            | 4 ++++
>  include/linux/topology.h                           | 3 +++
>  5 files changed, 18 insertions(+)

> diff --git a/drivers/base/topology.c b/drivers/base/topology.c
> index 793c592e533a..4c8674715d36 100644
> --- a/drivers/base/topology.c
> +++ b/drivers/base/topology.c
> @@ -54,6 +54,9 @@ static DEVICE_ATTR_RO(cluster_id);
>  define_id_show_func(core_id, "%d");
>  static DEVICE_ATTR_RO(core_id);
>  
> +define_id_show_func(ppin, "%llx");

			     "0x%llx"

Otherwise it is ambiguous.

> diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
> index cc164777e661..caba7db8c7b6 100644
> --- a/arch/x86/include/asm/topology.h
> +++ b/arch/x86/include/asm/topology.h
> @@ -110,6 +110,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu);
>  #define topology_logical_die_id(cpu)		(cpu_data(cpu).logical_die_id)
>  #define topology_die_id(cpu)			(cpu_data(cpu).cpu_die_id)
>  #define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)
> +#define topology_ppin(cpu)			(cpu_data(cpu).ppin)

That looks unused. No need to add it.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2022-01-20 13:35 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-07 22:54 [PATCH 0/5] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-07 22:54 ` [PATCH 1/5] x86/ras: Merge Intel and AMD ppin_init() functions Tony Luck
2022-01-18 20:02   ` Borislav Petkov
2022-01-18 21:03     ` Luck, Tony
2022-01-18 21:15       ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 2/5] x86/ras: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-01-20 13:32   ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 3/5] x86/ras: Read/save PPIN MSR during initialization Tony Luck
2022-01-07 22:54 ` [PATCH 4/5] x86/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-01-20 13:32   ` Borislav Petkov
2022-01-07 22:54 ` [PATCH 5/5] x86/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-01-20 13:35   ` Borislav Petkov [this message]
2022-01-20 18:01     ` Luck, Tony
2022-01-20 22:48       ` Borislav Petkov
2022-01-21 17:47 ` [PATCH v2 0/6] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-21 17:47   ` [PATCH v2 1/6] x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN Tony Luck
2022-01-25 17:55     ` [tip: x86/urgent] " tip-bot2 for Tony Luck
2022-01-21 17:47   ` [PATCH v2 2/6] x86/cpu: Merge Intel and AMD ppin_init() functions Tony Luck
2022-01-27 10:22     ` Borislav Petkov
2022-01-27 16:52       ` Luck, Tony
2022-01-21 17:47   ` [PATCH v2 3/6] x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-01-21 17:47   ` [PATCH v2 4/6] x86/cpu: Read/save PPIN MSR during initialization Tony Luck
2022-01-21 17:47   ` [PATCH v2 5/6] topology/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-01-31 11:34     ` Greg Kroah-Hartman
2022-01-21 17:47   ` [PATCH v2 6/6] topology/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-01-31 11:35     ` Greg Kroah-Hartman
2022-01-31 12:31   ` [PATCH v2 0/6] PPIN (Protected Processor Inventory Number) updates Borislav Petkov
2022-01-31 17:23     ` Luck, Tony
2022-01-31 18:18       ` Borislav Petkov
2022-01-31 18:49         ` Luck, Tony
2022-01-31 19:10           ` Borislav Petkov
2022-01-31 19:29             ` Luck, Tony
2022-01-31 21:58               ` Borislav Petkov
2022-01-31 22:03                 ` Luck, Tony
2022-04-06 22:01                 ` [PATCH] topology/sysfs: Hide PPIN on systems that do not support it Tony Luck
2022-04-25 22:46                   ` Andrew Morton
2022-04-25 22:56                     ` Luck, Tony
2022-01-31 23:01   ` [PATCH v3 0/5] PPIN (Protected Processor Inventory Number) updates Tony Luck
2022-01-31 23:01     ` [PATCH v3 1/5] x86/cpu: Merge Intel and AMD ppin_init() functions Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 2/5] x86/cpu: X86_FEATURE_INTEL_PPIN finally has a CPUID bit Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 3/5] x86/cpu: Read/save PPIN MSR during initialization Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 4/5] topology/sysfs: Add format parameter to macro defining "show" functions for proc Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck
2022-01-31 23:01     ` [PATCH v3 5/5] topology/sysfs: Add PPIN in sysfs under cpu topology Tony Luck
2022-02-02  6:31       ` [tip: x86/cpu] " tip-bot2 for Tony Luck

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