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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
	Sven Peter <sven@svenpeter.dev>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dougall <dougallj@gmail.com>,
	kernel-team@android.com, Rob Herring <robh@kernel.org>
Subject: [PATCH v5 03/10] dt-bindings: apple, aic: Add affinity description for per-cpu pseudo-interrupts
Date: Tue,  8 Feb 2022 18:55:57 +0000	[thread overview]
Message-ID: <20220208185604.1097957-4-maz@kernel.org> (raw)
In-Reply-To: <20220208185604.1097957-1-maz@kernel.org>

Some of the FIQ per-cpu pseudo-interrupts are better described with
a specific affinity, the most obvious candidate being the CPU PMUs.

Augment the AIC binding to be able to specify that affinity in the
interrupt controller node.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 .../interrupt-controller/apple,aic.yaml       | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index c7577d401786..85c85b694217 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -70,6 +70,35 @@ properties:
   power-domains:
     maxItems: 1
 
+  affinities:
+    type: object
+    additionalProperties: false
+    description:
+      FIQ affinity can be expressed as a single "affinities" node,
+      containing a set of sub-nodes, one per FIQ with a non-default
+      affinity.
+    patternProperties:
+      "^.+-affinity$":
+        type: object
+        additionalProperties: false
+        properties:
+          apple,fiq-index:
+            description:
+              The interrupt number specified as a FIQ, and for which
+              the affinity is not the default.
+            $ref: /schemas/types.yaml#/definitions/uint32
+            maximum: 5
+
+          cpus:
+            $ref: /schemas/types.yaml#/definitions/phandle-array
+            description:
+              Should be a list of phandles to CPU nodes (as described in
+              Documentation/devicetree/bindings/arm/cpus.yaml).
+
+        required:
+          - fiq-index
+          - cpus
+
 required:
   - compatible
   - '#interrupt-cells'
-- 
2.30.2


_______________________________________________
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WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
	Will Deacon <will@kernel.org>, Hector Martin <marcan@marcan.st>,
	Sven Peter <sven@svenpeter.dev>,
	Alyssa Rosenzweig <alyssa@rosenzweig.io>,
	Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dougall <dougallj@gmail.com>,
	kernel-team@android.com, Rob Herring <robh@kernel.org>
Subject: [PATCH v5 03/10] dt-bindings: apple,aic: Add affinity description for per-cpu pseudo-interrupts
Date: Tue,  8 Feb 2022 18:55:57 +0000	[thread overview]
Message-ID: <20220208185604.1097957-4-maz@kernel.org> (raw)
In-Reply-To: <20220208185604.1097957-1-maz@kernel.org>

Some of the FIQ per-cpu pseudo-interrupts are better described with
a specific affinity, the most obvious candidate being the CPU PMUs.

Augment the AIC binding to be able to specify that affinity in the
interrupt controller node.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 .../interrupt-controller/apple,aic.yaml       | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index c7577d401786..85c85b694217 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -70,6 +70,35 @@ properties:
   power-domains:
     maxItems: 1
 
+  affinities:
+    type: object
+    additionalProperties: false
+    description:
+      FIQ affinity can be expressed as a single "affinities" node,
+      containing a set of sub-nodes, one per FIQ with a non-default
+      affinity.
+    patternProperties:
+      "^.+-affinity$":
+        type: object
+        additionalProperties: false
+        properties:
+          apple,fiq-index:
+            description:
+              The interrupt number specified as a FIQ, and for which
+              the affinity is not the default.
+            $ref: /schemas/types.yaml#/definitions/uint32
+            maximum: 5
+
+          cpus:
+            $ref: /schemas/types.yaml#/definitions/phandle-array
+            description:
+              Should be a list of phandles to CPU nodes (as described in
+              Documentation/devicetree/bindings/arm/cpus.yaml).
+
+        required:
+          - fiq-index
+          - cpus
+
 required:
   - compatible
   - '#interrupt-cells'
-- 
2.30.2


  parent reply	other threads:[~2022-02-08 19:00 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-08 18:55 [PATCH v5 00/10] drivers/perf: CPU PMU driver for Apple M1 Marc Zyngier
2022-02-08 18:55 ` Marc Zyngier
2022-02-08 18:55 ` [PATCH v5 01/10] dt-bindings: arm-pmu: Document Apple PMU compatible strings Marc Zyngier
2022-02-08 18:55   ` Marc Zyngier
2022-02-08 18:55 ` [PATCH v5 02/10] dt-bindings: apple, aic: Add CPU PMU per-cpu pseudo-interrupts Marc Zyngier
2022-02-08 18:55   ` [PATCH v5 02/10] dt-bindings: apple,aic: " Marc Zyngier
2022-02-08 18:55 ` Marc Zyngier [this message]
2022-02-08 18:55   ` [PATCH v5 03/10] dt-bindings: apple,aic: Add affinity description for " Marc Zyngier
2022-02-08 18:55 ` [PATCH v5 04/10] irqchip/apple-aic: Parse FIQ affinities from device-tree Marc Zyngier
2022-02-08 18:55   ` Marc Zyngier
2022-02-08 18:55 ` [PATCH v5 05/10] irqchip/apple-aic: Wire PMU interrupts Marc Zyngier
2022-02-08 18:55   ` Marc Zyngier
2022-02-08 18:56 ` [PATCH v5 06/10] arm64: dts: apple: Add t8103 PMU interrupt affinities Marc Zyngier
2022-02-08 18:56   ` Marc Zyngier
2022-02-08 18:56 ` [PATCH v5 07/10] arm64: dts: apple: Add t8303 PMU nodes Marc Zyngier
2022-02-08 18:56   ` Marc Zyngier
2022-02-08 18:56 ` [PATCH v5 08/10] irqchip/apple-aic: Move PMU-specific registers to their own include file Marc Zyngier
2022-02-08 18:56   ` Marc Zyngier
2022-02-08 18:56 ` [PATCH v5 09/10] drivers/perf: arm_pmu: Handle 47 bit counters Marc Zyngier
2022-02-08 18:56   ` Marc Zyngier
2022-02-08 18:56 ` [PATCH v5 10/10] drivers/perf: Add Apple icestorm/firestorm CPU PMU driver Marc Zyngier
2022-02-08 18:56   ` Marc Zyngier
2022-03-07 15:55 ` [PATCH v5 00/10] drivers/perf: CPU PMU driver for Apple M1 Marc Zyngier
2022-03-07 15:55   ` Marc Zyngier
2022-03-08 14:10   ` Will Deacon
2022-03-08 14:10     ` Will Deacon

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