From: "Christian König" <ckoenig.leichtzumerken@gmail.com>
To: daniel@ffwll.ch, sumit.semwal@linaro.org,
dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org
Subject: [PATCH 18/23] drm/amdgpu: remove dma_resv workaround
Date: Fri, 11 Feb 2022 13:49:58 +0100 [thread overview]
Message-ID: <20220211125003.918447-19-christian.koenig@amd.com> (raw)
In-Reply-To: <20220211125003.918447-1-christian.koenig@amd.com>
We can now add multiple writers to the dma_resv object.
Also enable the check for not adding containers in dma_resv.c again.
Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: amd-gfx@lists.freedesktop.org
---
drivers/dma-buf/dma-resv.c | 6 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 51 ++-------------------
3 files changed, 8 insertions(+), 50 deletions(-)
diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c
index 821ef47c3a24..9484690a440a 100644
--- a/drivers/dma-buf/dma-resv.c
+++ b/drivers/dma-buf/dma-resv.c
@@ -308,10 +308,10 @@ void dma_resv_add_fence(struct dma_resv *obj, struct dma_fence *fence,
dma_resv_assert_held(obj);
- /* TODO: Drivers should not add containers here, instead add each fence
- * individually. Disabled for now until we cleaned up amdgpu/ttm.
+ /* Drivers should not add containers here, instead add each fence
+ * individually.
*/
- /* WARN_ON(dma_fence_is_container(fence)); */
+ WARN_ON(dma_fence_is_container(fence));
fobj = dma_resv_fences_list(obj);
count = fobj->num_fences;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h
index 044b41f0bfd9..529d52a204cf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h
@@ -34,7 +34,6 @@ struct amdgpu_fpriv;
struct amdgpu_bo_list_entry {
struct ttm_validate_buffer tv;
struct amdgpu_bo_va *bo_va;
- struct dma_fence_chain *chain;
uint32_t priority;
struct page **user_pages;
bool user_invalidated;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index c21ae6694df7..5227c2f4fead 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -575,14 +575,6 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
e->bo_va = amdgpu_vm_bo_find(vm, bo);
-
- if (bo->tbo.base.dma_buf && !amdgpu_bo_explicit_sync(bo)) {
- e->chain = dma_fence_chain_alloc();
- if (!e->chain) {
- r = -ENOMEM;
- goto error_validate;
- }
- }
}
amdgpu_cs_get_threshold_for_moves(p->adev, &p->bytes_moved_threshold,
@@ -633,13 +625,8 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
}
error_validate:
- if (r) {
- amdgpu_bo_list_for_each_entry(e, p->bo_list) {
- dma_fence_chain_free(e->chain);
- e->chain = NULL;
- }
+ if (r)
ttm_eu_backoff_reservation(&p->ticket, &p->validated);
- }
out:
return r;
}
@@ -679,17 +666,9 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error,
{
unsigned i;
- if (error && backoff) {
- struct amdgpu_bo_list_entry *e;
-
- amdgpu_bo_list_for_each_entry(e, parser->bo_list) {
- dma_fence_chain_free(e->chain);
- e->chain = NULL;
- }
-
+ if (error && backoff)
ttm_eu_backoff_reservation(&parser->ticket,
&parser->validated);
- }
for (i = 0; i < parser->num_post_deps; i++) {
drm_syncobj_put(parser->post_deps[i].syncobj);
@@ -1264,29 +1243,9 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
amdgpu_vm_move_to_lru_tail(p->adev, &fpriv->vm);
- amdgpu_bo_list_for_each_entry(e, p->bo_list) {
- struct dma_resv *resv = e->tv.bo->base.resv;
- struct dma_fence_chain *chain = e->chain;
- struct dma_resv_iter cursor;
- struct dma_fence *fence;
-
- if (!chain)
- continue;
-
- /*
- * Work around dma_resv shortcommings by wrapping up the
- * submission in a dma_fence_chain and add it as exclusive
- * fence.
- */
- dma_resv_for_each_fence(&cursor, resv,
- DMA_RESV_USAGE_WRITE,
- fence) {
- break;
- }
- dma_fence_chain_init(chain, fence, dma_fence_get(p->fence), 1);
- dma_resv_add_fence(resv, &chain->base, DMA_RESV_USAGE_WRITE);
- e->chain = NULL;
- }
+ /* Make sure all BOs are remembered as writers */
+ amdgpu_bo_list_for_each_entry(e, p->bo_list)
+ e->tv.num_shared = 0;
ttm_eu_fence_buffer_objects(&p->ticket, &p->validated, p->fence);
mutex_unlock(&p->adev->notifier_lock);
--
2.25.1
next prev parent reply other threads:[~2022-02-11 12:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-11 12:49 completely rework the dma_resv semantic Christian König
2022-02-11 12:49 ` [PATCH 01/23] dma-buf: add dma_resv_replace_fences Christian König
2022-02-11 12:49 ` [PATCH 02/23] dma-buf: finally make the dma_resv_list private v2 Christian König
2022-02-11 12:49 ` [PATCH 03/23] dma-buf: add dma_resv_get_singleton v2 Christian König
2022-02-11 12:49 ` [PATCH 04/23] RDMA: use dma_resv_wait() instead of extracting the fence Christian König
2022-02-11 12:49 ` [PATCH 05/23] drm/etnaviv: stop using dma_resv_excl_fence Christian König
2022-02-11 12:49 ` [PATCH 06/23] drm/nouveau: " Christian König
2022-02-11 12:49 ` [PATCH 07/23] drm/vmwgfx: " Christian König
2022-02-11 12:49 ` [PATCH 08/23] drm/radeon: " Christian König
2022-02-11 12:49 ` [PATCH 09/23] drm/amdgpu: use dma_resv_for_each_fence for CS workaround Christian König
2022-02-11 12:49 ` [PATCH 10/23] dma-buf: finally make dma_resv_excl_fence private v2 Christian König
2022-02-11 12:49 ` [PATCH 11/23] dma-buf: drop the DAG approach for the dma_resv object Christian König
2022-02-11 12:49 ` [PATCH 12/23] dma-buf/drivers: make reserving a shared slot mandatory v3 Christian König
2022-02-11 12:49 ` [PATCH 13/23] drm/atomic-helper: support more than one write fence in drm_gem_plane_helper_prepare_fb Christian König
2022-02-11 12:49 ` [PATCH 14/23] drm/nouveau: support more than one write fence in fenv50_wndw_prepare_fb Christian König
2022-02-11 12:49 ` [PATCH 15/23] drm/amdgpu: use dma_resv_get_singleton in amdgpu_pasid_free_cb Christian König
2022-02-11 12:49 ` [PATCH 16/23] dma-buf: add enum dma_resv_usage v3 Christian König
2022-02-11 12:49 ` [PATCH 17/23] dma-buf: specify usage while adding fences to dma_resv obj v4 Christian König
2022-02-11 12:49 ` Christian König [this message]
2022-02-11 12:49 ` [PATCH 19/23] dma-buf: add DMA_RESV_USAGE_KERNEL Christian König
2022-02-11 12:50 ` [PATCH 20/23] dma-buf: add DMA_RESV_USAGE_BOOKKEEP v2 Christian König
2022-02-11 12:50 ` [PATCH 21/23] dma-buf: wait for map to complete for static attachments Christian König
2022-02-11 12:50 ` [PATCH 22/23] drm/i915: drop bo->moving dependency Christian König
2022-02-11 12:50 ` [PATCH 23/23] drm/ttm: remove bo->moving Christian König
2022-02-18 11:03 ` completely rework the dma_resv semantic Christian König
-- strict thread matches above, loose matches on Subject: below --
2022-03-21 13:58 [PATCH 01/23] dma-buf: add dma_resv_replace_fences v2 Christian König
2022-03-21 13:58 ` [PATCH 18/23] drm/amdgpu: remove dma_resv workaround Christian König
2022-03-29 15:47 ` Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220211125003.918447-19-christian.koenig@amd.com \
--to=ckoenig.leichtzumerken@gmail.com \
--cc=daniel@ffwll.ch \
--cc=dri-devel@lists.freedesktop.org \
--cc=linaro-mm-sig@lists.linaro.org \
--cc=sumit.semwal@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.