Re: [PATCH v1 13/14] mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag

[Pratyush Yadav <p.yadav@ti.com>]

On 10/02/22 03:34AM, Tudor.Ambarus@microchip.com wrote:
> On 2/2/22 16:58, Michael Walle wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > 
> > Now that all functions using that flag are local to the spanion module,

s/spanion/spansion/

> > we can convert the flag to a manufacturer one.
> > 
> > Signed-off-by: Michael Walle <michael@walle.cc>
> > ---
> >  drivers/mtd/spi-nor/core.c     |  3 --
> >  drivers/mtd/spi-nor/core.h     |  3 --
> >  drivers/mtd/spi-nor/spansion.c | 54 +++++++++++++++++++++-------------
> >  3 files changed, 33 insertions(+), 27 deletions(-)
> > 
> > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> > index 5b00dfab77a6..2d5517b3db96 100644
> > --- a/drivers/mtd/spi-nor/core.c
> > +++ b/drivers/mtd/spi-nor/core.c
> > @@ -2448,9 +2448,6 @@ static void spi_nor_init_flags(struct spi_nor *nor)
> > 
> >         if (flags & NO_CHIP_ERASE)
> >                 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
> > -
> > -       if (flags & USE_CLSR)
> > -               nor->flags |= SNOR_F_USE_CLSR;
> >  }
> > 
> >  /**
> > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> > index a02bf54289fb..2130a96e2044 100644
> > --- a/drivers/mtd/spi-nor/core.h
> > +++ b/drivers/mtd/spi-nor/core.h
> > @@ -14,7 +14,6 @@
> >  enum spi_nor_option_flags {
> >         SNOR_F_HAS_SR_TB        = BIT(1),
> >         SNOR_F_NO_OP_CHIP_ERASE = BIT(2),
> > -       SNOR_F_USE_CLSR         = BIT(4),
> >         SNOR_F_BROKEN_RESET     = BIT(5),
> >         SNOR_F_4B_OPCODES       = BIT(6),
> >         SNOR_F_HAS_4BAIT        = BIT(7),
> > @@ -347,7 +346,6 @@ struct spi_nor_fixups {
> >   *   SPI_NOR_NO_ERASE:        no erase command needed.
> >   *   NO_CHIP_ERASE:           chip does not support chip erase.
> >   *   SPI_NOR_NO_FR:           can't do fastread.
> > - *   USE_CLSR:                use CLSR command.
> >   *
> >   * @no_sfdp_flags:  flags that indicate support that can be discovered via SFDP.
> >   *                  Used when SFDP tables are not defined in the flash. These
> > @@ -398,7 +396,6 @@ struct flash_info {
> >  #define SPI_NOR_NO_ERASE               BIT(6)
> >  #define NO_CHIP_ERASE                  BIT(7)
> >  #define SPI_NOR_NO_FR                  BIT(8)
> > -#define USE_CLSR                       BIT(9)
> > 
> >         u8 no_sfdp_flags;
> >  #define SPI_NOR_SKIP_SFDP              BIT(0)
> > diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> > index 4756fb88eab2..c31ea11f71f2 100644
> > --- a/drivers/mtd/spi-nor/spansion.c
> > +++ b/drivers/mtd/spi-nor/spansion.c
> > @@ -8,6 +8,8 @@
> > 
> >  #include "core.h"
> > 
> > +#define USE_CLSR       BIT(0)
> 
> add a description, tell the reader this is a manufacturer specific flag.

+1

> excellent work:

+1

> 
> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

Reviewed-by: Pratyush Yadav <p.yadav@ti.com>

> 
> > +
> >  #define SPINOR_OP_CLSR         0x30    /* Clear status register 1 */
> >  #define SPINOR_OP_RD_ANY_REG                   0x65    /* Read any register */
> >  #define SPINOR_OP_WR_ANY_REG                   0x71    /* Write any register */
> > @@ -212,43 +214,53 @@ static const struct flash_info spansion_parts[] = {
> >         { "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128)
> >                 NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> >         { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64)
> > -               FLAGS(USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256)
> > -               FLAGS(USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128)
> > -               FLAGS(USE_CLSR)
> >                 NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ |
> > -                             SPI_NOR_QUAD_READ) },
> > +                             SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512)
> > -               FLAGS(USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fl512s",  INFO6(0x010220, 0x4d0080, 256 * 1024, 256)
> > -               FLAGS(SPI_NOR_HAS_LOCK | USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               FLAGS(SPI_NOR_HAS_LOCK)
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256)
> > -               FLAGS(USE_CLSR)
> >                 NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> >                 .fixups = &s25fs_s_fixups, },
> >         { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128)
> > -               FLAGS(USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512)
> > -               FLAGS(USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
> > -               FLAGS(USE_CLSR)
> >                 NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> >                 .fixups = &s25fs_s_fixups, },
> >         { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64) },
> >         { "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256) },
> >         { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64)
> > -               FLAGS(USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256)
> > -               FLAGS(USE_CLSR)
> > -               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> > +               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> > +               MFR_FLAGS(USE_CLSR)
> > +       },
> >         { "s25sl004a",  INFO(0x010212,      0,  64 * 1024,   8) },
> >         { "s25sl008a",  INFO(0x010213,      0,  64 * 1024,  16) },
> >         { "s25sl016a",  INFO(0x010214,      0,  64 * 1024,  32) },
> > @@ -370,7 +382,7 @@ static void spansion_late_init(struct spi_nor *nor)
> >                 nor->mtd.erasesize = nor->info->sector_size;
> >         }
> > 
> > -       if (nor->flags & SNOR_F_USE_CLSR)
> > +       if (nor->info->mfr_flags & USE_CLSR)
> >                 nor->params->ready = spi_nor_sr_ready_and_clear;
> >  }
> > 
> > --
> > 2.30.2
> > 
> 

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.

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